4f5cfa81dc
These were added to the migration from v4 to v5 and should be removed now that the default has changed.
281 lines
10 KiB
LLVM
281 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 --mattr=+enable-flat-scratch < %s | FileCheck -check-prefixes=GCN,FLAT_SCR_OPT %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 --mattr=+architected-flat-scratch < %s | FileCheck -check-prefixes=GCN,FLAT_SCR_ARCH %s
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declare void @extern_func() #0
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define amdgpu_kernel void @stack_object_addrspacecast_in_kernel_no_calls() {
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; FLAT_SCR_OPT-LABEL: stack_object_addrspacecast_in_kernel_no_calls:
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; FLAT_SCR_OPT: ; %bb.0:
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; FLAT_SCR_OPT-NEXT: s_add_u32 s8, s8, s13
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; FLAT_SCR_OPT-NEXT: s_addc_u32 s9, s9, 0
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; FLAT_SCR_OPT-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
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; FLAT_SCR_OPT-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
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; FLAT_SCR_OPT-NEXT: s_mov_b64 s[0:1], src_private_base
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; FLAT_SCR_OPT-NEXT: v_mov_b32_e32 v0, 0
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; FLAT_SCR_OPT-NEXT: v_mov_b32_e32 v1, s1
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; FLAT_SCR_OPT-NEXT: v_mov_b32_e32 v2, 0
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; FLAT_SCR_OPT-NEXT: flat_store_dword v[0:1], v2
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; FLAT_SCR_OPT-NEXT: s_waitcnt_vscnt null, 0x0
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; FLAT_SCR_OPT-NEXT: s_endpgm
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;
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; FLAT_SCR_ARCH-LABEL: stack_object_addrspacecast_in_kernel_no_calls:
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; FLAT_SCR_ARCH: ; %bb.0:
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; FLAT_SCR_ARCH-NEXT: s_mov_b64 s[0:1], src_private_base
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; FLAT_SCR_ARCH-NEXT: v_mov_b32_e32 v0, 0
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; FLAT_SCR_ARCH-NEXT: v_mov_b32_e32 v1, s1
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; FLAT_SCR_ARCH-NEXT: v_mov_b32_e32 v2, 0
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; FLAT_SCR_ARCH-NEXT: flat_store_dword v[0:1], v2
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; FLAT_SCR_ARCH-NEXT: s_waitcnt_vscnt null, 0x0
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; FLAT_SCR_ARCH-NEXT: s_endpgm
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%alloca = alloca i32, addrspace(5)
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%cast = addrspacecast ptr addrspace(5) %alloca to ptr
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store volatile i32 0, ptr %cast
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ret void
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}
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define amdgpu_kernel void @stack_object_in_kernel_no_calls() {
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; FLAT_SCR_OPT-LABEL: stack_object_in_kernel_no_calls:
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; FLAT_SCR_OPT: ; %bb.0:
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; FLAT_SCR_OPT-NEXT: s_add_u32 s8, s8, s13
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; FLAT_SCR_OPT-NEXT: s_addc_u32 s9, s9, 0
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; FLAT_SCR_OPT-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
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; FLAT_SCR_OPT-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
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; FLAT_SCR_OPT-NEXT: v_mov_b32_e32 v0, 0
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; FLAT_SCR_OPT-NEXT: s_mov_b32 s0, 0
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; FLAT_SCR_OPT-NEXT: scratch_store_dword off, v0, s0
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; FLAT_SCR_OPT-NEXT: s_waitcnt_vscnt null, 0x0
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; FLAT_SCR_OPT-NEXT: s_endpgm
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;
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; FLAT_SCR_ARCH-LABEL: stack_object_in_kernel_no_calls:
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; FLAT_SCR_ARCH: ; %bb.0:
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; FLAT_SCR_ARCH-NEXT: v_mov_b32_e32 v0, 0
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; FLAT_SCR_ARCH-NEXT: s_mov_b32 s0, 0
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; FLAT_SCR_ARCH-NEXT: scratch_store_dword off, v0, s0
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; FLAT_SCR_ARCH-NEXT: s_waitcnt_vscnt null, 0x0
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; FLAT_SCR_ARCH-NEXT: s_endpgm
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%alloca = alloca i32, addrspace(5)
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store volatile i32 0, ptr addrspace(5) %alloca
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ret void
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}
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define amdgpu_kernel void @kernel_calls_no_stack() {
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; FLAT_SCR_OPT-LABEL: kernel_calls_no_stack:
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; FLAT_SCR_OPT: ; %bb.0:
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; FLAT_SCR_OPT-NEXT: s_add_u32 s8, s8, s13
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; FLAT_SCR_OPT-NEXT: s_mov_b32 s32, 0
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; FLAT_SCR_OPT-NEXT: s_addc_u32 s9, s9, 0
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; FLAT_SCR_OPT-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
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; FLAT_SCR_OPT-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
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; FLAT_SCR_OPT-NEXT: s_mov_b64 s[8:9], s[4:5]
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; FLAT_SCR_OPT-NEXT: s_getpc_b64 s[4:5]
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; FLAT_SCR_OPT-NEXT: s_add_u32 s4, s4, extern_func@gotpcrel32@lo+4
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; FLAT_SCR_OPT-NEXT: s_addc_u32 s5, s5, extern_func@gotpcrel32@hi+12
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; FLAT_SCR_OPT-NEXT: v_lshlrev_b32_e32 v2, 20, v2
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; FLAT_SCR_OPT-NEXT: s_load_dwordx2 s[16:17], s[4:5], 0x0
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; FLAT_SCR_OPT-NEXT: v_lshlrev_b32_e32 v1, 10, v1
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; FLAT_SCR_OPT-NEXT: s_mov_b32 s14, s12
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; FLAT_SCR_OPT-NEXT: s_mov_b32 s13, s11
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; FLAT_SCR_OPT-NEXT: s_mov_b32 s12, s10
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; FLAT_SCR_OPT-NEXT: s_mov_b64 s[10:11], s[6:7]
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; FLAT_SCR_OPT-NEXT: v_or3_b32 v31, v0, v1, v2
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; FLAT_SCR_OPT-NEXT: s_mov_b64 s[4:5], s[0:1]
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; FLAT_SCR_OPT-NEXT: s_mov_b64 s[6:7], s[2:3]
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; FLAT_SCR_OPT-NEXT: s_waitcnt lgkmcnt(0)
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; FLAT_SCR_OPT-NEXT: s_swappc_b64 s[30:31], s[16:17]
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; FLAT_SCR_OPT-NEXT: s_endpgm
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;
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; FLAT_SCR_ARCH-LABEL: kernel_calls_no_stack:
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; FLAT_SCR_ARCH: ; %bb.0:
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; FLAT_SCR_ARCH-NEXT: s_mov_b32 s13, s9
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; FLAT_SCR_ARCH-NEXT: s_mov_b32 s12, s8
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; FLAT_SCR_ARCH-NEXT: s_mov_b64 s[8:9], s[4:5]
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; FLAT_SCR_ARCH-NEXT: s_getpc_b64 s[4:5]
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; FLAT_SCR_ARCH-NEXT: s_add_u32 s4, s4, extern_func@gotpcrel32@lo+4
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; FLAT_SCR_ARCH-NEXT: s_addc_u32 s5, s5, extern_func@gotpcrel32@hi+12
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; FLAT_SCR_ARCH-NEXT: v_lshlrev_b32_e32 v2, 20, v2
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; FLAT_SCR_ARCH-NEXT: s_load_dwordx2 s[16:17], s[4:5], 0x0
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; FLAT_SCR_ARCH-NEXT: v_lshlrev_b32_e32 v1, 10, v1
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; FLAT_SCR_ARCH-NEXT: s_mov_b32 s14, s10
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; FLAT_SCR_ARCH-NEXT: s_mov_b64 s[10:11], s[6:7]
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; FLAT_SCR_ARCH-NEXT: s_mov_b64 s[4:5], s[0:1]
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; FLAT_SCR_ARCH-NEXT: s_mov_b64 s[6:7], s[2:3]
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; FLAT_SCR_ARCH-NEXT: v_or3_b32 v31, v0, v1, v2
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; FLAT_SCR_ARCH-NEXT: s_mov_b32 s32, 0
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; FLAT_SCR_ARCH-NEXT: s_waitcnt lgkmcnt(0)
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; FLAT_SCR_ARCH-NEXT: s_swappc_b64 s[30:31], s[16:17]
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; FLAT_SCR_ARCH-NEXT: s_endpgm
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call void @extern_func()
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ret void
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}
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define amdgpu_kernel void @test(ptr addrspace(1) %out, i32 %in) {
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; GCN-LABEL: test:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_clause 0x1
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; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GCN-NEXT: s_load_dword vcc_lo, s[4:5], 0x8
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; GCN-NEXT: ; implicit-def: $vgpr0 : SGPR spill to VGPR lane
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; GCN-NEXT: ; kill: killed $sgpr4_sgpr5
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_writelane_b32 v0, s0, 0
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; GCN-NEXT: v_writelane_b32 v0, s1, 1
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: v_readlane_b32 s0, v0, 0
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; GCN-NEXT: v_mov_b32_e32 v1, vcc_lo
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; GCN-NEXT: v_readlane_b32 s1, v0, 1
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; GCN-NEXT: v_mov_b32_e32 v2, 0
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: ;;#ASMSTART
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; GCN-NEXT: ;;#ASMEND
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; GCN-NEXT: global_store_dword v2, v1, s[0:1]
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; GCN-NEXT: s_endpgm
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call void asm sideeffect "", "~{s[0:7]}" ()
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call void asm sideeffect "", "~{s[8:15]}" ()
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call void asm sideeffect "", "~{s[16:23]}" ()
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call void asm sideeffect "", "~{s[24:31]}" ()
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call void asm sideeffect "", "~{s[32:39]}" ()
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call void asm sideeffect "", "~{s[40:47]}" ()
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call void asm sideeffect "", "~{s[48:55]}" ()
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call void asm sideeffect "", "~{s[56:63]}" ()
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call void asm sideeffect "", "~{s[64:71]}" ()
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call void asm sideeffect "", "~{s[72:79]}" ()
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call void asm sideeffect "", "~{s[80:87]}" ()
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call void asm sideeffect "", "~{s[88:95]}" ()
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call void asm sideeffect "", "~{s[96:103]}" ()
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call void asm sideeffect "", "~{s[104:105]}" ()
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call void asm sideeffect "", "~{v[1:7]}" ()
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call void asm sideeffect "", "~{v[8:15]}" ()
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call void asm sideeffect "", "~{v[16:23]}" ()
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call void asm sideeffect "", "~{v[24:31]}" ()
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call void asm sideeffect "", "~{v[32:39]}" ()
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call void asm sideeffect "", "~{v[40:47]}" ()
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call void asm sideeffect "", "~{v[48:55]}" ()
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call void asm sideeffect "", "~{v[56:63]}" ()
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call void asm sideeffect "", "~{v[64:71]}" ()
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call void asm sideeffect "", "~{v[72:79]}" ()
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call void asm sideeffect "", "~{v[80:87]}" ()
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call void asm sideeffect "", "~{v[88:95]}" ()
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call void asm sideeffect "", "~{v[96:103]}" ()
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call void asm sideeffect "", "~{v[104:111]}" ()
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call void asm sideeffect "", "~{v[112:119]}" ()
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call void asm sideeffect "", "~{v[120:127]}" ()
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call void asm sideeffect "", "~{v[128:135]}" ()
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call void asm sideeffect "", "~{v[136:143]}" ()
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call void asm sideeffect "", "~{v[144:151]}" ()
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call void asm sideeffect "", "~{v[152:159]}" ()
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call void asm sideeffect "", "~{v[160:167]}" ()
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call void asm sideeffect "", "~{v[168:175]}" ()
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call void asm sideeffect "", "~{v[176:183]}" ()
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call void asm sideeffect "", "~{v[184:191]}" ()
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call void asm sideeffect "", "~{v[192:199]}" ()
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call void asm sideeffect "", "~{v[200:207]}" ()
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call void asm sideeffect "", "~{v[208:215]}" ()
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call void asm sideeffect "", "~{v[216:223]}" ()
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call void asm sideeffect "", "~{v[224:231]}" ()
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call void asm sideeffect "", "~{v[232:239]}" ()
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call void asm sideeffect "", "~{v[240:247]}" ()
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call void asm sideeffect "", "~{v[248:255]}" ()
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store i32 %in, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_kernel void @kernel_no_calls_no_stack() {
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; GCN-LABEL: kernel_no_calls_no_stack:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_endpgm
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ret void
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}
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attributes #0 = { nounwind }
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