ac0f64f06d
Allocating wwm-registers and per-thread VGPR operands together imposes many challenges in the way the registers are reused during allocation. There are times when regalloc reuses the registers of regular VGPRs operations for wwm-operations in a small range leading to unwantedly clobbering their inactive lanes causing correctness issues that are hard to trace. This patch splits the VGPR allocation pipeline further to allocate wwm-registers first and the regular VGPR operands in a separate pipeline. The splitting would ensure that the physical registers used for wwm allocations won't take part in the next allocation pipeline to avoid any such clobbering.
61 lines
2.3 KiB
YAML
61 lines
2.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -stress-regalloc=2 -start-before=greedy -stop-after=virtregmap -o - %s | FileCheck %s
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# Test that a spill of a copy of m0 is not folded to be a spill of m0 directly.
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---
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name: merge_sgpr_spill_into_copy_from_m0
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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body: |
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bb.0:
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; CHECK-LABEL: name: merge_sgpr_spill_into_copy_from_m0
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; CHECK: S_NOP 0, implicit-def $m0
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; CHECK-NEXT: $sgpr0 = S_MOV_B32 $m0
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; CHECK-NEXT: $vgpr0 = IMPLICIT_DEF
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; CHECK-NEXT: $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, $vgpr0
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; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0
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; CHECK-NEXT: S_NOP 0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0, implicit killed renamable $sgpr0
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; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0
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; CHECK-NEXT: $m0 = S_MOV_B32 killed $sgpr0
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; CHECK-NEXT: S_NOP 0
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; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
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S_NOP 0, implicit-def $m0
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%0:sreg_32 = COPY $m0
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S_NOP 0, implicit-def %1:sreg_32, implicit-def %2:sreg_32, implicit %0
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$m0 = COPY %0
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S_SENDMSG 0, implicit $m0, implicit $exec
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...
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# Test that a reload into a copy of m0 is not folded to be a reload of m0 directly.
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---
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name: reload_sgpr_spill_into_copy_to_m0
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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body: |
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bb.0:
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; CHECK-LABEL: name: reload_sgpr_spill_into_copy_to_m0
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; CHECK: $vgpr0 = IMPLICIT_DEF
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; CHECK-NEXT: S_NOP 0, implicit-def renamable $sgpr0, implicit-def dead renamable $sgpr1, implicit-def $m0
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; CHECK-NEXT: $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, $vgpr0
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; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0
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; CHECK-NEXT: S_NOP 0, implicit killed renamable $sgpr0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0
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; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0
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; CHECK-NEXT: $m0 = S_MOV_B32 killed $sgpr0
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; CHECK-NEXT: S_NOP 0
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; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
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S_NOP 0, implicit-def %0:sreg_32, implicit-def %1:sreg_32, implicit-def $m0
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S_NOP 0, implicit %0, implicit-def %3:sreg_32, implicit-def %4:sreg_32
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$m0 = COPY %0
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S_SENDMSG 0, implicit $m0, implicit $exec
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...
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