ee13638362
Since e39f6c1844fab59c638d8059a6cf139adb42279a opt will infer the correct datalayout when given a triple. Avoid explicitly specifying it in tests that depend on the AMDGPU target being present to avoid the string becoming out of sync with the TargetInfo value. Only tests with REQUIRES: amdgpu-registered-target or a local lit.cfg were updated to ensure that tests for non-target-specific passes that happen to use the AMDGPU layout still pass when building with a limited set of targets. Reviewed By: shiltian, arsenm Pull Request: https://github.com/llvm/llvm-project/pull/137921
96 lines
3.4 KiB
LLVM
96 lines
3.4 KiB
LLVM
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-always-inline -amdgpu-enable-lower-module-lds=false %s | FileCheck --check-prefix=ALL %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-always-inline -amdgpu-enable-lower-module-lds=false %s | FileCheck --check-prefix=ALL %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-stress-function-calls -passes=amdgpu-always-inline -amdgpu-enable-lower-module-lds=false %s | FileCheck --check-prefix=ALL %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-stress-function-calls -passes=amdgpu-always-inline -amdgpu-enable-lower-module-lds=false %s | FileCheck --check-prefix=ALL %s
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@lds0 = addrspace(3) global i32 poison, align 4
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@lds1 = addrspace(3) global [512 x i32] poison, align 4
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@nested.lds.address = addrspace(1) global ptr addrspace(3) @lds0, align 4
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@gds0 = addrspace(2) global i32 poison, align 4
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@alias.lds0 = alias i32, ptr addrspace(3) @lds0
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@lds.cycle = addrspace(3) global i32 ptrtoint (ptr addrspace(3) @lds.cycle to i32), align 4
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; ALL-LABEL: define i32 @load_lds_simple() #0 {
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define i32 @load_lds_simple() {
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%load = load i32, ptr addrspace(3) @lds0, align 4
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ret i32 %load
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}
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; ALL-LABEL: define i32 @load_gds_simple() #0 {
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define i32 @load_gds_simple() {
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%load = load i32, ptr addrspace(2) @gds0, align 4
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ret i32 %load
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}
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; ALL-LABEL: define i32 @load_lds_const_gep() #0 {
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define i32 @load_lds_const_gep() {
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%load = load i32, ptr addrspace(3) getelementptr inbounds ([512 x i32], ptr addrspace(3) @lds1, i64 0, i64 4), align 4
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ret i32 %load
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}
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; ALL-LABEL: define i32 @load_lds_var_gep(i32 %idx) #0 {
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define i32 @load_lds_var_gep(i32 %idx) {
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%gep = getelementptr inbounds [512 x i32], ptr addrspace(3) @lds1, i32 0, i32 %idx
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%load = load i32, ptr addrspace(3) %gep, align 4
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ret i32 %load
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}
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; ALL-LABEL: define ptr addrspace(3) @load_nested_address(i32 %idx) #0 {
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define ptr addrspace(3) @load_nested_address(i32 %idx) {
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%load = load ptr addrspace(3), ptr addrspace(1) @nested.lds.address, align 4
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ret ptr addrspace(3) %load
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}
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; ALL-LABEL: define i32 @load_lds_alias() #0 {
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define i32 @load_lds_alias() {
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%load = load i32, ptr addrspace(3) @alias.lds0, align 4
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ret i32 %load
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}
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; ALL-LABEL: define i32 @load_lds_cycle() #0 {
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define i32 @load_lds_cycle() {
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%load = load i32, ptr addrspace(3) @lds.cycle, align 4
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ret i32 %load
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}
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; ALL-LABEL: define i1 @icmp_lds_address() #0 {
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define i1 @icmp_lds_address() {
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%cmp = icmp eq ptr addrspace(3) @lds0, null
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ret i1 %cmp
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}
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; ALL-LABEL: define i32 @transitive_call() #0 {
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define i32 @transitive_call() {
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%call = call i32 @load_lds_simple()
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ret i32 %call
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}
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; ALL-LABEL: define i32 @recursive_call_lds(i32 %arg0) #0 {
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define i32 @recursive_call_lds(i32 %arg0) {
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%load = load i32, ptr addrspace(3) @lds0, align 4
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%add = add i32 %arg0, %load
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%call = call i32 @recursive_call_lds(i32 %add)
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ret i32 %call
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}
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; Test we don't break the IR and have both alwaysinline and noinline
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; FIXME: We should really not override noinline.
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; ALL-LABEL: define i32 @load_lds_simple_noinline() #0 {
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define i32 @load_lds_simple_noinline() noinline {
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%load = load i32, ptr addrspace(3) @lds0, align 4
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ret i32 %load
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}
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; ALL-LABEL: define i32 @recursive_call_lds_noinline(i32 %arg0) #0 {
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define i32 @recursive_call_lds_noinline(i32 %arg0) noinline {
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%load = load i32, ptr addrspace(3) @lds0, align 4
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%add = add i32 %arg0, %load
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%call = call i32 @recursive_call_lds(i32 %add)
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ret i32 %call
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}
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; ALL: attributes #0 = { alwaysinline }
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