9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
121 lines
3.3 KiB
LLVM
121 lines
3.3 KiB
LLVM
; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=SI --check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=SI --check-prefix=FUNC %s
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; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG --check-prefix=FUNC %s
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declare float @llvm.trunc.f32(float) nounwind readnone
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declare <2 x float> @llvm.trunc.v2f32(<2 x float>) nounwind readnone
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declare <3 x float> @llvm.trunc.v3f32(<3 x float>) nounwind readnone
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declare <4 x float> @llvm.trunc.v4f32(<4 x float>) nounwind readnone
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declare <8 x float> @llvm.trunc.v8f32(<8 x float>) nounwind readnone
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declare <16 x float> @llvm.trunc.v16f32(<16 x float>) nounwind readnone
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; FUNC-LABEL: {{^}}ftrunc_f32:
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; EG: TRUNC
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; SI: v_trunc_f32_e32
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define amdgpu_kernel void @ftrunc_f32(ptr addrspace(1) %out, float %x) {
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%y = call float @llvm.trunc.f32(float %x) nounwind readnone
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store float %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ftrunc_v2f32:
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; EG: TRUNC
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; EG: TRUNC
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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define amdgpu_kernel void @ftrunc_v2f32(ptr addrspace(1) %out, <2 x float> %x) {
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%y = call <2 x float> @llvm.trunc.v2f32(<2 x float> %x) nounwind readnone
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store <2 x float> %y, ptr addrspace(1) %out
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ret void
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}
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; FIXME-FUNC-LABEL: {{^}}ftrunc_v3f32:
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; FIXME-EG: TRUNC
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; FIXME-EG: TRUNC
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; FIXME-EG: TRUNC
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; FIXME-SI: v_trunc_f32_e32
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; FIXME-SI: v_trunc_f32_e32
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; FIXME-SI: v_trunc_f32_e32
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; define amdgpu_kernel void @ftrunc_v3f32(ptr addrspace(1) %out, <3 x float> %x) {
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; %y = call <3 x float> @llvm.trunc.v3f32(<3 x float> %x) nounwind readnone
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; store <3 x float> %y, ptr addrspace(1) %out
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; ret void
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; }
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; FUNC-LABEL: {{^}}ftrunc_v4f32:
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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define amdgpu_kernel void @ftrunc_v4f32(ptr addrspace(1) %out, <4 x float> %x) {
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%y = call <4 x float> @llvm.trunc.v4f32(<4 x float> %x) nounwind readnone
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store <4 x float> %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ftrunc_v8f32:
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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define amdgpu_kernel void @ftrunc_v8f32(ptr addrspace(1) %out, <8 x float> %x) {
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%y = call <8 x float> @llvm.trunc.v8f32(<8 x float> %x) nounwind readnone
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store <8 x float> %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ftrunc_v16f32:
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; EG: TRUNC
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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; SI: v_trunc_f32_e32
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define amdgpu_kernel void @ftrunc_v16f32(ptr addrspace(1) %out, <16 x float> %x) {
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%y = call <16 x float> @llvm.trunc.v16f32(<16 x float> %x) nounwind readnone
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store <16 x float> %y, ptr addrspace(1) %out
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ret void
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}
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