fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
233 lines
9.2 KiB
LLVM
233 lines
9.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s --amdgpu-lower-module-lds-strategy=module | FileCheck -enable-var-scope -check-prefixes=CHECK,GFX9 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s --amdgpu-lower-module-lds-strategy=module | FileCheck -enable-var-scope -check-prefixes=CHECK,GFX10 %s
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; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx900 < %s --amdgpu-lower-module-lds-strategy=module | FileCheck -enable-var-scope -check-prefixes=CHECK,G_GFX9 %s
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; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1010 < %s --amdgpu-lower-module-lds-strategy=module | FileCheck -enable-var-scope -check-prefixes=CHECK,G_GFX10 %s
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; Test case looks at the allocated offset of @used_by_both. It's at zero when
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; allocated by itself, but at 8 when allocated in combination with the double.
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; Redundantly also checks LDSByteSize.
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@used_by_both = addrspace(3) global i32 poison
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@used_by_kernel = addrspace(3) global i32 poison
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@used_by_function = addrspace(3) global double poison
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; kernel that calls no functions and uses an LDS variable allocates only that
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; variable, so accesses at at offset 0 and LDSByteSize is 4
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define amdgpu_kernel void @nocall_ideal() {
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; CHECK-LABEL: nocall_ideal:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: v_mov_b32_e32 v0, 0
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; CHECK-NEXT: ds_write_b32 v0, v0
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; CHECK-NEXT: s_endpgm
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store i32 0, ptr addrspace(3) @used_by_kernel
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ret void
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}
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; CHECK: ; LDSByteSize: 4 bytes
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define void @nonkernel() {
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; GFX9-LABEL: nonkernel:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0
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; GFX9-NEXT: v_mov_b32_e32 v1, v0
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; GFX9-NEXT: ds_write_b32 v0, v0 offset:8
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; GFX9-NEXT: ds_write_b64 v0, v[0:1]
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; GFX9-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: nonkernel:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_mov_b32_e32 v0, 0
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; GFX10-NEXT: v_mov_b32_e32 v1, v0
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; GFX10-NEXT: ds_write_b32 v0, v0 offset:8
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; GFX10-NEXT: ds_write_b64 v0, v[0:1]
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; GFX10-NEXT: s_waitcnt lgkmcnt(0)
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; G_GFX9-LABEL: nonkernel:
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; G_GFX9: ; %bb.0:
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; G_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; G_GFX9-NEXT: v_mov_b32_e32 v2, 0
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; G_GFX9-NEXT: v_mov_b32_e32 v3, 8
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; G_GFX9-NEXT: v_mov_b32_e32 v0, 0
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; G_GFX9-NEXT: v_mov_b32_e32 v1, 0
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; G_GFX9-NEXT: ds_write_b32 v3, v2
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; G_GFX9-NEXT: ds_write_b64 v2, v[0:1]
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; G_GFX9-NEXT: s_waitcnt lgkmcnt(0)
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; G_GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; G_GFX10-LABEL: nonkernel:
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; G_GFX10: ; %bb.0:
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; G_GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; G_GFX10-NEXT: v_mov_b32_e32 v2, 0
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; G_GFX10-NEXT: v_mov_b32_e32 v3, 8
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; G_GFX10-NEXT: v_mov_b32_e32 v0, 0
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; G_GFX10-NEXT: v_mov_b32_e32 v1, 0
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; G_GFX10-NEXT: ds_write_b32 v3, v2
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; G_GFX10-NEXT: ds_write_b64 v2, v[0:1]
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; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
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; G_GFX10-NEXT: s_setpc_b64 s[30:31]
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store i32 0, ptr addrspace(3) @used_by_both
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store double 0.0, ptr addrspace(3) @used_by_function
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ret void
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}
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; Needs to allocate both variables, store to used_by_both is at sizeof(double)
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define amdgpu_kernel void @withcall() {
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; GFX9-LABEL: withcall:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_mov_b32 s20, SCRATCH_RSRC_DWORD0
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; GFX9-NEXT: s_mov_b32 s21, SCRATCH_RSRC_DWORD1
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; GFX9-NEXT: s_mov_b32 s22, -1
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; GFX9-NEXT: s_mov_b32 s23, 0xe00000
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; GFX9-NEXT: s_add_u32 s20, s20, s11
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; GFX9-NEXT: s_addc_u32 s21, s21, 0
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; GFX9-NEXT: s_mov_b32 s12, s8
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; GFX9-NEXT: s_add_u32 s8, s4, 36
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; GFX9-NEXT: s_mov_b32 s13, s9
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; GFX9-NEXT: s_addc_u32 s9, s5, 0
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; GFX9-NEXT: s_getpc_b64 s[4:5]
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; GFX9-NEXT: s_add_u32 s4, s4, nonkernel@gotpcrel32@lo+4
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; GFX9-NEXT: s_addc_u32 s5, s5, nonkernel@gotpcrel32@hi+12
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; GFX9-NEXT: s_load_dwordx2 s[16:17], s[4:5], 0x0
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; GFX9-NEXT: s_mov_b32 s14, s10
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; GFX9-NEXT: s_mov_b64 s[10:11], s[6:7]
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; GFX9-NEXT: v_lshlrev_b32_e32 v2, 20, v2
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; GFX9-NEXT: v_lshlrev_b32_e32 v1, 10, v1
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; GFX9-NEXT: s_mov_b64 s[4:5], s[0:1]
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; GFX9-NEXT: s_mov_b64 s[6:7], s[2:3]
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; GFX9-NEXT: s_mov_b64 s[0:1], s[20:21]
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; GFX9-NEXT: v_mov_b32_e32 v3, 0
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; GFX9-NEXT: v_or3_b32 v31, v0, v1, v2
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; GFX9-NEXT: s_mov_b64 s[2:3], s[22:23]
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; GFX9-NEXT: s_mov_b32 s32, 0
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; GFX9-NEXT: ds_write_b32 v3, v3 offset:8
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; GFX9-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9-NEXT: s_swappc_b64 s[30:31], s[16:17]
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; GFX9-NEXT: s_endpgm
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;
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; GFX10-LABEL: withcall:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_mov_b32 s20, SCRATCH_RSRC_DWORD0
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; GFX10-NEXT: s_mov_b32 s21, SCRATCH_RSRC_DWORD1
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; GFX10-NEXT: s_mov_b32 s22, -1
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; GFX10-NEXT: s_mov_b32 s23, 0x31c16000
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; GFX10-NEXT: s_add_u32 s20, s20, s11
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; GFX10-NEXT: s_addc_u32 s21, s21, 0
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; GFX10-NEXT: s_mov_b32 s12, s8
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; GFX10-NEXT: s_add_u32 s8, s4, 36
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; GFX10-NEXT: s_mov_b32 s13, s9
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; GFX10-NEXT: s_addc_u32 s9, s5, 0
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; GFX10-NEXT: s_getpc_b64 s[4:5]
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; GFX10-NEXT: s_add_u32 s4, s4, nonkernel@gotpcrel32@lo+4
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; GFX10-NEXT: s_addc_u32 s5, s5, nonkernel@gotpcrel32@hi+12
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; GFX10-NEXT: v_lshlrev_b32_e32 v2, 20, v2
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; GFX10-NEXT: s_load_dwordx2 s[16:17], s[4:5], 0x0
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; GFX10-NEXT: v_lshlrev_b32_e32 v1, 10, v1
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; GFX10-NEXT: v_mov_b32_e32 v3, 0
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; GFX10-NEXT: s_mov_b32 s14, s10
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; GFX10-NEXT: s_mov_b64 s[10:11], s[6:7]
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; GFX10-NEXT: s_mov_b64 s[4:5], s[0:1]
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; GFX10-NEXT: v_or3_b32 v31, v0, v1, v2
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; GFX10-NEXT: s_mov_b64 s[6:7], s[2:3]
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; GFX10-NEXT: s_mov_b64 s[0:1], s[20:21]
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; GFX10-NEXT: s_mov_b64 s[2:3], s[22:23]
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; GFX10-NEXT: s_mov_b32 s32, 0
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; GFX10-NEXT: ds_write_b32 v3, v3 offset:8
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; GFX10-NEXT: s_waitcnt lgkmcnt(0)
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; GFX10-NEXT: s_swappc_b64 s[30:31], s[16:17]
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; GFX10-NEXT: s_endpgm
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;
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; G_GFX9-LABEL: withcall:
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; G_GFX9: ; %bb.0:
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; G_GFX9-NEXT: s_mov_b32 s20, SCRATCH_RSRC_DWORD0
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; G_GFX9-NEXT: s_mov_b32 s21, SCRATCH_RSRC_DWORD1
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; G_GFX9-NEXT: s_mov_b32 s22, -1
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; G_GFX9-NEXT: s_mov_b32 s23, 0xe00000
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; G_GFX9-NEXT: s_add_u32 s20, s20, s11
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; G_GFX9-NEXT: s_addc_u32 s21, s21, 0
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; G_GFX9-NEXT: s_mov_b32 s16, s8
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; G_GFX9-NEXT: s_add_u32 s8, s4, 36
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; G_GFX9-NEXT: s_mov_b32 s15, s9
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; G_GFX9-NEXT: s_addc_u32 s9, s5, 0
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; G_GFX9-NEXT: s_mov_b64 s[12:13], s[0:1]
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; G_GFX9-NEXT: s_getpc_b64 s[0:1]
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; G_GFX9-NEXT: s_add_u32 s0, s0, nonkernel@gotpcrel32@lo+4
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; G_GFX9-NEXT: s_addc_u32 s1, s1, nonkernel@gotpcrel32@hi+12
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; G_GFX9-NEXT: s_load_dwordx2 s[18:19], s[0:1], 0x0
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; G_GFX9-NEXT: s_mov_b32 s14, s10
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; G_GFX9-NEXT: s_mov_b64 s[10:11], s[6:7]
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; G_GFX9-NEXT: s_mov_b64 s[6:7], s[2:3]
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; G_GFX9-NEXT: v_lshlrev_b32_e32 v1, 10, v1
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; G_GFX9-NEXT: v_lshlrev_b32_e32 v2, 20, v2
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; G_GFX9-NEXT: s_mov_b64 s[0:1], s[20:21]
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; G_GFX9-NEXT: v_mov_b32_e32 v3, 0
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; G_GFX9-NEXT: v_mov_b32_e32 v4, 8
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; G_GFX9-NEXT: v_or3_b32 v31, v0, v1, v2
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; G_GFX9-NEXT: s_mov_b64 s[2:3], s[22:23]
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; G_GFX9-NEXT: s_mov_b64 s[4:5], s[12:13]
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; G_GFX9-NEXT: s_mov_b32 s12, s16
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; G_GFX9-NEXT: s_mov_b32 s13, s15
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; G_GFX9-NEXT: s_mov_b32 s32, 0
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; G_GFX9-NEXT: ds_write_b32 v4, v3
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; G_GFX9-NEXT: s_waitcnt lgkmcnt(0)
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; G_GFX9-NEXT: s_swappc_b64 s[30:31], s[18:19]
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; G_GFX9-NEXT: s_endpgm
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;
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; G_GFX10-LABEL: withcall:
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; G_GFX10: ; %bb.0:
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; G_GFX10-NEXT: s_mov_b32 s20, SCRATCH_RSRC_DWORD0
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; G_GFX10-NEXT: s_mov_b32 s21, SCRATCH_RSRC_DWORD1
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; G_GFX10-NEXT: s_mov_b32 s22, -1
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; G_GFX10-NEXT: s_mov_b32 s23, 0x31c16000
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; G_GFX10-NEXT: s_add_u32 s20, s20, s11
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; G_GFX10-NEXT: s_addc_u32 s21, s21, 0
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; G_GFX10-NEXT: s_mov_b32 s16, s8
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; G_GFX10-NEXT: s_add_u32 s8, s4, 36
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; G_GFX10-NEXT: s_mov_b32 s15, s9
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; G_GFX10-NEXT: s_addc_u32 s9, s5, 0
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; G_GFX10-NEXT: s_mov_b64 s[12:13], s[0:1]
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; G_GFX10-NEXT: s_getpc_b64 s[0:1]
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; G_GFX10-NEXT: s_add_u32 s0, s0, nonkernel@gotpcrel32@lo+4
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; G_GFX10-NEXT: s_addc_u32 s1, s1, nonkernel@gotpcrel32@hi+12
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; G_GFX10-NEXT: v_lshlrev_b32_e32 v1, 10, v1
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; G_GFX10-NEXT: s_load_dwordx2 s[18:19], s[0:1], 0x0
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; G_GFX10-NEXT: v_lshlrev_b32_e32 v2, 20, v2
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; G_GFX10-NEXT: v_mov_b32_e32 v3, 0
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; G_GFX10-NEXT: v_mov_b32_e32 v4, 8
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; G_GFX10-NEXT: s_mov_b32 s14, s10
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; G_GFX10-NEXT: s_mov_b64 s[10:11], s[6:7]
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; G_GFX10-NEXT: v_or3_b32 v31, v0, v1, v2
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; G_GFX10-NEXT: s_mov_b64 s[6:7], s[2:3]
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; G_GFX10-NEXT: s_mov_b64 s[0:1], s[20:21]
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; G_GFX10-NEXT: s_mov_b64 s[2:3], s[22:23]
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; G_GFX10-NEXT: s_mov_b64 s[4:5], s[12:13]
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; G_GFX10-NEXT: s_mov_b32 s12, s16
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; G_GFX10-NEXT: s_mov_b32 s13, s15
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; G_GFX10-NEXT: s_mov_b32 s32, 0
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; G_GFX10-NEXT: ds_write_b32 v4, v3
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; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
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; G_GFX10-NEXT: s_swappc_b64 s[30:31], s[18:19]
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; G_GFX10-NEXT: s_endpgm
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store i32 0, ptr addrspace(3) @used_by_both
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call void @nonkernel()
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ret void
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}
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; CHECK: ; LDSByteSize: 16 bytes
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; Previous lowering was less efficient here than necessary as the i32 used
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; by the kernel is also used by an unrelated non-kernel function. Codegen
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; is now the same as nocall_ideal.
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define amdgpu_kernel void @nocall_false_sharing() {
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; CHECK-LABEL: nocall_false_sharing:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: v_mov_b32_e32 v0, 0
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; CHECK-NEXT: ds_write_b32 v0, v0
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; CHECK-NEXT: s_endpgm
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store i32 0, ptr addrspace(3) @used_by_both
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ret void
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}
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; CHECK: ; LDSByteSize: 4 bytes
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