a5cbd2ab0b
…133242)" This reverts commit 130080fab11cde5efcb338b77f5c3b31097df6e6 because it causes issues in testcases similar to coalescer_remat.ll [1], i.e. when we use a VGPR tuple but only write to its lower parts. The high VGPRs would then not be included in the vgpr_count, and accessing them would be an out of bounds violation. [1] https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
87 lines
3.3 KiB
LLVM
87 lines
3.3 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck %s
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; CHECK-LABEL: {{^}}qux
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; CHECK: .set qux.num_vgpr, 13
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; CHECK: .set qux.num_agpr, 0
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; CHECK: .set qux.numbered_sgpr, 32
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; CHECK: .set qux.private_seg_size, 0
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; CHECK: .set qux.uses_vcc, 0
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; CHECK: .set qux.uses_flat_scratch, 0
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; CHECK: .set qux.has_dyn_sized_stack, 0
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; CHECK: .set qux.has_recursion, 0
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; CHECK: .set qux.has_indirect_call, 0
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define void @qux() {
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entry:
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call void asm sideeffect "", "~{v12}"()
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ret void
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}
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; CHECK-LABEL: {{^}}baz
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; CHECK: .set baz.num_vgpr, max(49, qux.num_vgpr)
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; CHECK: .set baz.num_agpr, max(0, qux.num_agpr)
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; CHECK: .set baz.numbered_sgpr, max(34, qux.numbered_sgpr)
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; CHECK: .set baz.private_seg_size, 16+max(qux.private_seg_size)
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; CHECK: .set baz.uses_vcc, or(0, qux.uses_vcc)
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; CHECK: .set baz.uses_flat_scratch, or(0, qux.uses_flat_scratch)
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; CHECK: .set baz.has_dyn_sized_stack, or(0, qux.has_dyn_sized_stack)
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; CHECK: .set baz.has_recursion, or(1, qux.has_recursion)
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; CHECK: .set baz.has_indirect_call, or(0, qux.has_indirect_call)
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define void @baz() {
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entry:
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call void @qux()
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call void asm sideeffect "", "~{v48}"()
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ret void
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}
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; CHECK-LABEL: {{^}}bar
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; CHECK: .set bar.num_vgpr, max(65, baz.num_vgpr, qux.num_vgpr)
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; CHECK: .set bar.num_agpr, max(0, baz.num_agpr, qux.num_agpr)
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; CHECK: .set bar.numbered_sgpr, max(34, baz.numbered_sgpr, qux.numbered_sgpr)
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; CHECK: .set bar.private_seg_size, 16+max(baz.private_seg_size, qux.private_seg_size)
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; CHECK: .set bar.uses_vcc, or(0, baz.uses_vcc, qux.uses_vcc)
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; CHECK: .set bar.uses_flat_scratch, or(0, baz.uses_flat_scratch, qux.uses_flat_scratch)
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; CHECK: .set bar.has_dyn_sized_stack, or(0, baz.has_dyn_sized_stack, qux.has_dyn_sized_stack)
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; CHECK: .set bar.has_recursion, or(1, baz.has_recursion, qux.has_recursion)
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; CHECK: .set bar.has_indirect_call, or(0, baz.has_indirect_call, qux.has_indirect_call)
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define void @bar() {
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entry:
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call void @baz()
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call void @qux()
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call void @baz()
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call void asm sideeffect "", "~{v64}"()
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ret void
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}
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; CHECK-LABEL: {{^}}foo
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; CHECK: .set foo.num_vgpr, max(38, bar.num_vgpr)
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; CHECK: .set foo.num_agpr, max(0, bar.num_agpr)
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; CHECK: .set foo.numbered_sgpr, max(34, bar.numbered_sgpr)
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; CHECK: .set foo.private_seg_size, 16+max(bar.private_seg_size)
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; CHECK: .set foo.uses_vcc, or(0, bar.uses_vcc)
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; CHECK: .set foo.uses_flat_scratch, or(0, bar.uses_flat_scratch)
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; CHECK: .set foo.has_dyn_sized_stack, or(0, bar.has_dyn_sized_stack)
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; CHECK: .set foo.has_recursion, or(1, bar.has_recursion)
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; CHECK: .set foo.has_indirect_call, or(0, bar.has_indirect_call)
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define void @foo() {
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entry:
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call void @bar()
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call void asm sideeffect "", "~{v37}"()
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ret void
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}
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; CHECK-LABEL: {{^}}usefoo
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; CHECK: .set usefoo.num_vgpr, max(32, foo.num_vgpr)
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; CHECK: .set usefoo.num_agpr, max(0, foo.num_agpr)
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; CHECK: .set usefoo.numbered_sgpr, max(33, foo.numbered_sgpr)
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; CHECK: .set usefoo.private_seg_size, 0+max(foo.private_seg_size)
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; CHECK: .set usefoo.uses_vcc, or(0, foo.uses_vcc)
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; CHECK: .set usefoo.uses_flat_scratch, or(1, foo.uses_flat_scratch)
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; CHECK: .set usefoo.has_dyn_sized_stack, or(0, foo.has_dyn_sized_stack)
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; CHECK: .set usefoo.has_recursion, or(1, foo.has_recursion)
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; CHECK: .set usefoo.has_indirect_call, or(0, foo.has_indirect_call)
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define amdgpu_kernel void @usefoo() {
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call void @foo()
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ret void
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}
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