llvm-project/llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll
Fangrui Song 9e9907f1cf
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
2024-01-16 21:54:58 -08:00

36 lines
1.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=r600 -mcpu=cypress -start-after safe-stack | FileCheck %s
; Don't crash
define amdgpu_kernel void @test(ptr addrspace(1) %out) {
; CHECK-LABEL: test:
; CHECK: ; %bb.0: ; %bb
; CHECK-NEXT: ALU 4, @6, KC0[CB0:0-32], KC1[]
; CHECK-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 0
; CHECK-NEXT: ALU 3, @11, KC0[], KC1[]
; CHECK-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; CHECK-NEXT: CF_END
; CHECK-NEXT: PAD
; CHECK-NEXT: ALU clause starting at 6:
; CHECK-NEXT: MOV T0.X, literal.x,
; CHECK-NEXT: MOV T0.Y, 0.0,
; CHECK-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
; CHECK-NEXT: 2(2.802597e-45), 0(0.000000e+00)
; CHECK-NEXT: MOV * T0.W, KC0[2].Y,
; CHECK-NEXT: ALU clause starting at 11:
; CHECK-NEXT: MOV T0.X, literal.x,
; CHECK-NEXT: MOV T0.Y, 0.0,
; CHECK-NEXT: LSHR * T1.X, T0.W, literal.y,
; CHECK-NEXT: 4(5.605194e-45), 2(2.802597e-45)
bb:
store i64 2, ptr addrspace(1) %out
%tmp = load i64, ptr addrspace(1) %out
br label %jump
jump: ; preds = %bb
%tmp1 = icmp ugt i64 %tmp, 4
%umax = select i1 %tmp1, i64 %tmp, i64 4
store i64 %umax, ptr addrspace(1) %out
ret void
}