fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
215 lines
4.4 KiB
LLVM
215 lines
4.4 KiB
LLVM
; RUN: llc -mtriple=amdgcn-- -mcpu=verde < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
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; RUN: llc -mtriple=amdgcn-- -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,SICIVI,VI,FUNC %s
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; RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,FUNC %s
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; RUN: llc -mtriple=r600-- -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
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; RUN: llc -mtriple=r600-- -mcpu=cayman < %s | FileCheck -check-prefixes=CM,FUNC %s
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; FUNC-LABEL: {{^}}store_local_i1:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_BYTE_WRITE
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; CM: LDS_BYTE_WRITE
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; GCN: ds_write_b8
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define amdgpu_kernel void @store_local_i1(ptr addrspace(3) %out) {
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entry:
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store i1 true, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_i8:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_BYTE_WRITE
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; CM: LDS_BYTE_WRITE
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; GCN: ds_write_b8
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define amdgpu_kernel void @store_local_i8(ptr addrspace(3) %out, i8 %in) {
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store i8 %in, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_i16:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_SHORT_WRITE
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; CM: LDS_SHORT_WRITE
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; GCN: ds_write_b16
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define amdgpu_kernel void @store_local_i16(ptr addrspace(3) %out, i16 %in) {
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store i16 %in, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v2i16:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_WRITE
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; CM: LDS_WRITE
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; GCN: ds_write_b32
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define amdgpu_kernel void @store_local_v2i16(ptr addrspace(3) %out, <2 x i16> %in) {
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entry:
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store <2 x i16> %in, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v4i8:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_WRITE
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; CM: LDS_WRITE
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; GCN: ds_write_b32
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define amdgpu_kernel void @store_local_v4i8(ptr addrspace(3) %out, <4 x i8> %in) {
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entry:
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store <4 x i8> %in, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v4i8_unaligned:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_BYTE_WRITE
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; EG: LDS_BYTE_WRITE
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; EG: LDS_BYTE_WRITE
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; EG: LDS_BYTE_WRITE
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; EG-NOT: LDS_WRITE
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; CM: LDS_BYTE_WRITE
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; CM: LDS_BYTE_WRITE
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; CM: LDS_BYTE_WRITE
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; CM: LDS_BYTE_WRITE
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; CM-NOT: LDS_WRITE
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; GCN: ds_write_b8
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; GCN: ds_write_b8
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; GCN: ds_write_b8
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; GCN: ds_write_b8
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define amdgpu_kernel void @store_local_v4i8_unaligned(ptr addrspace(3) %out, <4 x i8> %in) {
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entry:
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store <4 x i8> %in, ptr addrspace(3) %out, align 1
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v4i8_halfaligned:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_SHORT_WRITE
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; EG: LDS_SHORT_WRITE
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; EG-NOT: LDS_WRITE
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; CM: LDS_SHORT_WRITE
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; CM: LDS_SHORT_WRITE
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; CM-NOT: LDS_WRITE
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; GCN: ds_write_b16
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; GCN: ds_write_b16
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define amdgpu_kernel void @store_local_v4i8_halfaligned(ptr addrspace(3) %out, <4 x i8> %in) {
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entry:
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store <4 x i8> %in, ptr addrspace(3) %out, align 2
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v2i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; EG-NOT: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; CM-NOT: LDS_WRITE
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; GCN: ds_write_b64
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define amdgpu_kernel void @store_local_v2i32(ptr addrspace(3) %out, <2 x i32> %in) {
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entry:
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store <2 x i32> %in, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v4i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; SI: ds_write2_b32
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; VI: ds_write_b128
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; GFX9: ds_write_b128
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define amdgpu_kernel void @store_local_v4i32(ptr addrspace(3) %out, <4 x i32> %in) {
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entry:
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store <4 x i32> %in, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v4i32_align4:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; GCN: ds_write2_b32
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; GCN: ds_write2_b32
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define amdgpu_kernel void @store_local_v4i32_align4(ptr addrspace(3) %out, <4 x i32> %in) {
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entry:
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store <4 x i32> %in, ptr addrspace(3) %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_i64_i8:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_BYTE_WRITE
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; GCN: ds_write_b8
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define amdgpu_kernel void @store_local_i64_i8(ptr addrspace(3) %out, i64 %in) {
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entry:
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%0 = trunc i64 %in to i8
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store i8 %0, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_i64_i16:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; EG: LDS_SHORT_WRITE
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; GCN: ds_write_b16
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define amdgpu_kernel void @store_local_i64_i16(ptr addrspace(3) %out, i64 %in) {
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entry:
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%0 = trunc i64 %in to i16
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store i16 %0, ptr addrspace(3) %out
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ret void
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}
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