llvm-project/llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
Fangrui Song 9e9907f1cf
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
2024-01-16 21:54:58 -08:00

67 lines
1.6 KiB
LLVM

; RUN: llc -mtriple=amdgcn -mcpu=verde < %s | FileCheck %s
; Test a simple uniform loop that lives inside non-uniform control flow.
; CHECK-LABEL: {{^}}test1:
; CHECK: v_cmp_ne_u32_e32 vcc, 0
; CHECK: s_and_saveexec_b64
; CHECK-NEXT: s_cbranch_execz .LBB{{[0-9]+_[0-9]+}}
; CHECK: [[LOOP_BODY_LABEL:.LBB[0-9]+_[0-9]+]]: ; %loop_body
; CHECK: s_cbranch_scc1 [[LOOP_BODY_LABEL]]
; CHECK: s_endpgm
define amdgpu_ps void @test1(<8 x i32> inreg %rsrc, <2 x i32> %addr.base, i32 %y, i32 %p) {
main_body:
%cc = icmp eq i32 %p, 0
br i1 %cc, label %out, label %loop_body
loop_body:
%counter = phi i32 [ 0, %main_body ], [ %incr, %loop_body ]
; Prevent the loop from being optimized out
call void asm sideeffect "", "" ()
%incr = add i32 %counter, 1
%lc = icmp sge i32 %incr, 1000
br i1 %lc, label %out, label %loop_body
out:
ret void
}
; CHECK-LABEL: {{^}}test2:
; CHECK: s_and_saveexec_b64
; CHECK-NEXT: s_cbranch_execz
define amdgpu_kernel void @test2(ptr addrspace(1) %out, i32 %a, i32 %b) {
main_body:
%tid = call i32 @llvm.amdgcn.workitem.id.x() #1
%cc = icmp eq i32 %tid, 0
br i1 %cc, label %done1, label %if
if:
%cmp = icmp eq i32 %a, 0
br i1 %cmp, label %done0, label %loop_body
loop_body:
%counter = phi i32 [ 0, %if ], [0, %done0], [ %incr, %loop_body ]
; Prevent the loop from being optimized out
call void asm sideeffect "", "" ()
%incr = add i32 %counter, 1
%lc = icmp sge i32 %incr, 1000
br i1 %lc, label %done1, label %loop_body
done0:
%cmp0 = icmp eq i32 %b, 0
br i1 %cmp0, label %done1, label %loop_body
done1:
ret void
}
declare i32 @llvm.amdgcn.workitem.id.x() #1
attributes #1 = { nounwind readonly }