58a88001f3
This fixes the handling of subregister extract copies. This will allow AMDGPU to remove its implementation of shouldRewriteCopySrc, which exists as a 10 year old workaround to this bug. peephole-opt-fold-reg-sequence-subreg.mir will show the expected improvement once the custom implementation is removed. The copy coalescing processing here is overly abstracted from what's actually happening. Previously when visiting coalescable copy-like instructions, we would parse the sources one at a time and then pass the def of the root instruction into findNextSource. This means that the first thing the new ValueTracker constructed would do is getVRegDef to find the instruction we are currently processing. This adds an unnecessary step, placing a useless entry in the RewriteMap, and required skipping the no-op case where getNewSource would return the original source operand. This was a problem since in the case of a subregister extract, shouldRewriteCopySource would always say that it is useful to rewrite and the use-def chain walk would abort, returning the original operand. Move the process to start looking at the source operand to begin with. This does not fix the confused handling in the uncoalescable copy case which is proving to be more difficult. Some currently handled cases have multiple defs from a single source, and other handled cases have 0 input operands. It would be simpler if this was implemented with isCopyLikeInstr, rather than guessing at the operand structure as it does now. There are some improvements and some regressions. The regressions appear to be downstream issues for the most part. One of the uglier regressions is in PPC, where a sequence of insert_subrgs is used to build registers. I opened #125502 to use reg_sequence instead, which may help. The worst regression is an absurd SPARC testcase using a <251 x fp128>, which uses a very long chain of insert_subregs. We need improved subregister handling locally in PeepholeOptimizer, and other pasess like MachineCSE to fix some of the other regressions. We should handle subregister composes and folding more indexes into insert_subreg and reg_sequence.
79 lines
3.0 KiB
LLVM
79 lines
3.0 KiB
LLVM
; RUN: llc -mtriple=bpfel -mattr=+alu32 < %s | FileCheck %s
|
|
; Source:
|
|
; struct env_t {
|
|
; unsigned data;
|
|
; unsigned data_end;
|
|
; };
|
|
; extern int work(struct env_t *skb, unsigned offset);
|
|
; int test(struct env_t *skb)
|
|
; {
|
|
; ptr cursor, *data_end;
|
|
; struct env_t *srh, *ip;
|
|
;
|
|
; data_end = (ptr)(long)skb->data_end;
|
|
; cursor = (ptr)(long)skb->data;
|
|
;
|
|
; ip = cursor; cursor += sizeof(*ip);
|
|
; if ((ptr)ip + sizeof(*ip) > data_end)
|
|
; return 0;
|
|
;
|
|
; srh = cursor; cursor += sizeof(*srh);
|
|
; if ((ptr)srh + sizeof(*srh) > data_end)
|
|
; return 0;
|
|
;
|
|
; return work(skb, (char *)srh - (char *)(long)skb->data);
|
|
; }
|
|
; Compilation flag:
|
|
; clang -target bpf -O2 -emit-llvm -S test.c
|
|
|
|
%struct.env_t = type { i32, i32 }
|
|
|
|
; Function Attrs: nounwind
|
|
define dso_local i32 @test(ptr %skb) local_unnamed_addr #0 {
|
|
entry:
|
|
%data_end1 = getelementptr inbounds %struct.env_t, ptr %skb, i64 0, i32 1
|
|
%0 = load i32, ptr %data_end1, align 4, !tbaa !2
|
|
%conv = zext i32 %0 to i64
|
|
%1 = inttoptr i64 %conv to ptr
|
|
%2 = load i32, ptr %skb, align 4, !tbaa !7
|
|
%conv2 = zext i32 %2 to i64
|
|
%3 = inttoptr i64 %conv2 to ptr
|
|
%add.ptr = getelementptr i8, ptr %3, i64 8
|
|
%cmp = icmp ugt ptr %add.ptr, %1
|
|
%add.ptr6 = getelementptr i8, ptr %3, i64 16
|
|
%cmp7 = icmp ugt ptr %add.ptr6, %1
|
|
%or.cond = or i1 %cmp, %cmp7
|
|
br i1 %or.cond, label %cleanup, label %if.end10
|
|
|
|
if.end10: ; preds = %entry
|
|
%sub.ptr.lhs.cast = ptrtoint ptr %add.ptr to i64
|
|
%4 = trunc i64 %sub.ptr.lhs.cast to i32
|
|
%conv13 = sub i32 %4, %2
|
|
%call = tail call i32 @work(ptr nonnull %skb, i32 %conv13) #2
|
|
br label %cleanup
|
|
|
|
cleanup: ; preds = %entry, %if.end10
|
|
%retval.0 = phi i32 [ %call, %if.end10 ], [ 0, %entry ]
|
|
ret i32 %retval.0
|
|
}
|
|
|
|
; CHECK: w{{[0-9]+}} = *(u32 *)(r{{[0-9]+}} + 0)
|
|
|
|
declare dso_local i32 @work(ptr, i32) local_unnamed_addr #1
|
|
|
|
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
|
|
attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
|
|
attributes #2 = { nounwind }
|
|
|
|
!llvm.module.flags = !{!0}
|
|
!llvm.ident = !{!1}
|
|
|
|
!0 = !{i32 1, !"wchar_size", i32 4}
|
|
!1 = !{!"clang version 11.0.0 (https://github.com/llvm/llvm-project.git 016d3ce1f4b07ee3056f7c10fedb24c441c4870f)"}
|
|
!2 = !{!3, !4, i64 4}
|
|
!3 = !{!"env_t", !4, i64 0, !4, i64 4}
|
|
!4 = !{!"int", !5, i64 0}
|
|
!5 = !{!"omnipotent char", !6, i64 0}
|
|
!6 = !{!"Simple C/C++ TBAA"}
|
|
!7 = !{!3, !4, i64 0}
|