7f34d3acba
typedBufferLoad of double/double2 is expanded to a typedBufferLoad of a <2 x i32>/<4 x i32> and asdouble typedBufferStore of a double/double2 is expanded to a splitdouble and a typedBufferStore of a <2 x i32>/<4 x i32> Add tests showing result of intrinsic expansion for typedBufferLoad and typedBufferStore Add tests showing dxil op lowering can handle typedBufferLoad and typedBufferStore where the target type doesn't match the typedBufferLoad and typedBufferStore type Closes #104423
48 lines
2.4 KiB
LLVM
48 lines
2.4 KiB
LLVM
; RUN: opt -S -dxil-intrinsic-expansion %s | FileCheck %s
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target triple = "dxil-pc-shadermodel6.6-compute"
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define void @storef64(double %0) {
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; CHECK: [[B:%.*]] = tail call target("dx.TypedBuffer", double, 1, 0, 0)
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; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(
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; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
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%buffer = tail call target("dx.TypedBuffer", double, 1, 0, 0)
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@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(
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i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
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; check we split the double and store the lo and hi bits
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; CHECK: [[SD:%.*]] = call { i32, i32 } @llvm.dx.splitdouble.i32(double %0)
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; CHECK: [[Lo:%.*]] = extractvalue { i32, i32 } [[SD]], 0
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; CHECK: [[Hi:%.*]] = extractvalue { i32, i32 } [[SD]], 1
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; CHECK: [[Vec1:%.*]] = insertelement <2 x i32> poison, i32 [[Lo]], i32 0
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; CHECK: [[Vec2:%.*]] = insertelement <2 x i32> [[Vec1]], i32 [[Hi]], i32 1
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; CHECK: call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_f64_1_0_0t.v2i32(
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; CHECK-SAME: target("dx.TypedBuffer", double, 1, 0, 0) [[B]], i32 0, <2 x i32> [[Vec2]])
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call void @llvm.dx.resource.store.typedbuffer(
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target("dx.TypedBuffer", double, 1, 0, 0) %buffer, i32 0,
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double %0)
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ret void
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}
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define void @storev2f64(<2 x double> %0) {
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; CHECK: [[B:%.*]] = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0)
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; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t(
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; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
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%buffer = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0)
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@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t(
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i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
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; CHECK: [[SD:%.*]] = call { <2 x i32>, <2 x i32> }
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; CHECK-SAME: @llvm.dx.splitdouble.v2i32(<2 x double> %0)
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; CHECK: [[Lo:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[SD]], 0
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; CHECK: [[Hi:%.*]] = extractvalue { <2 x i32>, <2 x i32> } [[SD]], 1
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; CHECK: [[Vec:%.*]] = shufflevector <2 x i32> [[Lo]], <2 x i32> [[Hi]], <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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; CHECK: call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v2f64_1_0_0t.v4i32(
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; CHECK-SAME: target("dx.TypedBuffer", <2 x double>, 1, 0, 0) [[B]], i32 0, <4 x i32> [[Vec]])
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call void @llvm.dx.resource.store.typedbuffer(
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target("dx.TypedBuffer", <2 x double>, 1, 0, 0) %buffer, i32 0,
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<2 x double> %0)
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ret void
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}
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