21423c7fdc
Sibling to https://github.com/llvm/llvm-project/pull/145350 part of https://github.com/llvm/llvm-project/issues/144966 firstbituhigh and firstbitshigh should use the first arg for overloads instead of the return type since the return is always i32
63 lines
2.9 KiB
LLVM
63 lines
2.9 KiB
LLVM
; RUN: opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
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; Make sure dxil operation function calls for firstbitlow are generated for all integer types.
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define noundef i32 @test_firstbitlow_short(i16 noundef %a) {
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entry:
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; CHECK: call i32 @dx.op.unaryBits.i16(i32 32, i16 %{{.*}})
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%elt.firstbitlow = call i32 @llvm.dx.firstbitlow.i16(i16 %a)
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ret i32 %elt.firstbitlow
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}
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define noundef i32 @test_firstbitlow_int(i32 noundef %a) {
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entry:
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; CHECK: call i32 @dx.op.unaryBits.i32(i32 32, i32 %{{.*}})
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%elt.firstbitlow = call i32 @llvm.dx.firstbitlow.i32(i32 %a)
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ret i32 %elt.firstbitlow
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}
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define noundef i32 @test_firstbitlow_long(i64 noundef %a) {
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entry:
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; CHECK: call i32 @dx.op.unaryBits.i64(i32 32, i64 %{{.*}})
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%elt.firstbitlow = call i32 @llvm.dx.firstbitlow.i64(i64 %a)
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ret i32 %elt.firstbitlow
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}
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define noundef <4 x i32> @test_firstbitlow_vec4_i32(<4 x i32> noundef %a) {
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entry:
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; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
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; CHECK: [[ie0:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee0]])
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; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
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; CHECK: [[ie1:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee1]])
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; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
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; CHECK: [[ie2:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee2]])
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; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
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; CHECK: [[ie3:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee3]])
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; CHECK: [[rt0:%.*]] = insertelement <4 x i32> poison, i32 [[ie0]], i64 0
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; CHECK: [[rt1:%.*]] = insertelement <4 x i32> [[rt0]], i32 [[ie1]], i64 1
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; CHECK: [[rt2:%.*]] = insertelement <4 x i32> [[rt1]], i32 [[ie2]], i64 2
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; CHECK: [[rt3:%.*]] = insertelement <4 x i32> [[rt2]], i32 [[ie3]], i64 3
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; CHECK: ret <4 x i32> [[rt3]]
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%2 = call <4 x i32> @llvm.dx.firstbitlow.v4i32(<4 x i32> %a)
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ret <4 x i32> %2
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}
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define noundef <4 x i32> @test_firstbitlow_vec4_i16(<4 x i16> noundef %a) {
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entry:
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; CHECK: [[ee0:%.*]] = extractelement <4 x i16> %a, i64 0
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; CHECK: [[ie0:%.*]] = call i32 @dx.op.unaryBits.i16(i32 32, i16 [[ee0]])
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; CHECK: [[ee1:%.*]] = extractelement <4 x i16> %a, i64 1
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; CHECK: [[ie1:%.*]] = call i32 @dx.op.unaryBits.i16(i32 32, i16 [[ee1]])
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; CHECK: [[ee2:%.*]] = extractelement <4 x i16> %a, i64 2
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; CHECK: [[ie2:%.*]] = call i32 @dx.op.unaryBits.i16(i32 32, i16 [[ee2]])
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; CHECK: [[ee3:%.*]] = extractelement <4 x i16> %a, i64 3
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; CHECK: [[ie3:%.*]] = call i32 @dx.op.unaryBits.i16(i32 32, i16 [[ee3]])
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; CHECK: [[rt0:%.*]] = insertelement <4 x i32> poison, i32 [[ie0]], i64 0
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; CHECK: [[rt1:%.*]] = insertelement <4 x i32> [[rt0]], i32 [[ie1]], i64 1
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; CHECK: [[rt2:%.*]] = insertelement <4 x i32> [[rt1]], i32 [[ie2]], i64 2
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; CHECK: [[rt3:%.*]] = insertelement <4 x i32> [[rt2]], i32 [[ie3]], i64 3
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; CHECK: ret <4 x i32> [[rt3]]
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%2 = call <4 x i32> @llvm.dx.firstbitlow.v4i16(<4 x i16> %a)
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ret <4 x i32> %2
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}
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