2208c97c1b
Similar to 806761a7629df268c8aed49657aeccffa6bca449 -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly.
56 lines
1.4 KiB
LLVM
56 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -mtriple=hexagon < %s | FileCheck %s
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;
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; Check if we generate rounding-asr instruction. It is equivalent to
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; Rd = ((Rs >> #u) +1) >> 1.
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target triple = "hexagon"
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define i32 @f0(i32 %a0) {
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; CHECK-LABEL: f0:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: // %bb.0: // %b0
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = asr(r0,#10):rnd
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; CHECK-NEXT: r1 = r0
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; CHECK-NEXT: r29 = add(r29,#-8)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r29 = add(r29,#8)
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: memw(r29+#4) = r1
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; CHECK-NEXT: }
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b0:
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%v0 = alloca i32, align 4
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store i32 %a0, ptr %v0, align 4
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%v1 = load i32, ptr %v0, align 4
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%v2 = ashr i32 %v1, 10
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%v3 = add nsw i32 %v2, 1
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%v4 = ashr i32 %v3, 1
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ret i32 %v4
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}
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define i64 @f1(i64 %a0) {
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; CHECK-LABEL: f1:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: // %bb.0: // %b0
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; CHECK-NEXT: {
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; CHECK-NEXT: r1:0 = asr(r1:0,#17):rnd
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; CHECK-NEXT: r3:2 = combine(r1,r0)
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; CHECK-NEXT: r29 = add(r29,#-8)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r29 = add(r29,#8)
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: memd(r29+#0) = r3:2
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; CHECK-NEXT: }
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b0:
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%v0 = alloca i64, align 8
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store i64 %a0, ptr %v0, align 8
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%v1 = load i64, ptr %v0, align 8
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%v2 = ashr i64 %v1, 17
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%v3 = add nsw i64 %v2, 1
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%v4 = ashr i64 %v3, 1
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ret i64 %v4
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}
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