Fangrui Song 2208c97c1b [Hexagon,test] Change llc -march= to -mtriple=
Similar to 806761a7629df268c8aed49657aeccffa6bca449

-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple, leaving a target triple which
may not make sense.

Therefore, -march= is error-prone and not recommended for tests without a target
triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead
of rejecting it outrightly.
2024-12-15 10:20:22 -08:00

90 lines
1.9 KiB
LLVM

; RUN: llc -mtriple=hexagon -hexagon-gen-mux-threshold=4 < %s | FileCheck %s
; Generate various cmpb instruction followed by if (p0) .. if (!p0)...
target triple = "hexagon"
@Enum_global = external global i8
define i32 @Func_3(i32) nounwind readnone {
entry:
; CHECK-NOT: mux
%conv = and i32 %0, 255
%cmp = icmp eq i32 %conv, 2
%selv = zext i1 %cmp to i32
ret i32 %selv
}
define i32 @Func_3b(i32) nounwind readonly {
entry:
; CHECK-NOT: mux
%1 = load i8, ptr @Enum_global, align 1
%2 = trunc i32 %0 to i8
%cmp = icmp ne i8 %1, %2
%selv = zext i1 %cmp to i32
ret i32 %selv
}
define i32 @Func_3c(i32) nounwind readnone {
entry:
; CHECK-NOT: mux
%conv = and i32 %0, 255
%cmp = icmp eq i32 %conv, 2
%selv = zext i1 %cmp to i32
ret i32 %selv
}
define i32 @Func_3d(i32) nounwind readonly {
entry:
; CHECK-NOT: mux
%1 = load i8, ptr @Enum_global, align 1
%2 = trunc i32 %0 to i8
%cmp = icmp eq i8 %1, %2
%selv = zext i1 %cmp to i32
ret i32 %selv
}
define i32 @Func_3e(i32) nounwind readonly {
entry:
; CHECK-NOT: mux
%1 = load i8, ptr @Enum_global, align 1
%2 = trunc i32 %0 to i8
%cmp = icmp eq i8 %1, %2
%selv = zext i1 %cmp to i32
ret i32 %selv
}
define i32 @Func_3f(i32) nounwind readnone {
entry:
; CHECK-NOT: mux
%conv = and i32 %0, 255
%cmp = icmp ugt i32 %conv, 2
%selv = zext i1 %cmp to i32
ret i32 %selv
}
define i32 @Func_3g(i32) nounwind readnone {
entry:
; CHECK-NOT: mux
%conv = and i32 %0, 255
%cmp = icmp ult i32 %conv, 3
%selv = zext i1 %cmp to i32
ret i32 %selv
}
define i32 @Func_3h(i32) nounwind readnone {
entry:
; CHECK-NOT: mux
%conv = and i32 %0, 254
%cmp = icmp ult i32 %conv, 2
%selv = zext i1 %cmp to i32
ret i32 %selv
}
define i32 @Func_3i(i32) nounwind readnone {
entry:
; CHECK-NOT: mux
%conv = and i32 %0, 254
%cmp = icmp ugt i32 %conv, 1
%selv = zext i1 %cmp to i32
ret i32 %selv
}