2208c97c1b
Similar to 806761a7629df268c8aed49657aeccffa6bca449 -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly.
209 lines
5.5 KiB
LLVM
209 lines
5.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=hexagon -O3 -hexagon-instsimplify=0 < %s | FileCheck %s
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define void @f0(ptr nocapture %a0, i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f0:
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; CHECK: // %bb.0: // %b0
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; CHECK-NEXT: {
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; CHECK-NEXT: loop0(.LBB0_1,#3)
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; CHECK-NEXT: }
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_1: // Block address taken
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; CHECK-NEXT: // %b2
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: {
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: } :endloop0
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; CHECK-NEXT: // %bb.2: // %b3
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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b0:
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br label %b1
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
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%v1 = add nsw i32 %v0, 1
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%v2 = icmp slt i32 %v1, 3
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br i1 %v2, label %b2, label %b3
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b3: ; preds = %b2
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ret void
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}
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define void @f1(ptr nocapture %a0, i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f1:
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; CHECK: // %bb.0: // %b0
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; CHECK-NEXT: {
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; CHECK-NEXT: loop0(.LBB1_1,#2)
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; CHECK-NEXT: }
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB1_1: // Block address taken
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; CHECK-NEXT: // %b2
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: {
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: } :endloop0
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; CHECK-NEXT: // %bb.2: // %b3
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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b0:
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br label %b1
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
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%v1 = add nsw i32 %v0, 2
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%v2 = icmp slt i32 %v1, 3
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br i1 %v2, label %b2, label %b3
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b3: ; preds = %b2
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ret void
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}
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define void @f2(ptr nocapture %a0, i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f2:
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; CHECK: // %bb.0: // %b0
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; CHECK-NEXT: {
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; CHECK-NEXT: loop0(.LBB2_1,#1)
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; CHECK-NEXT: }
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB2_1: // Block address taken
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; CHECK-NEXT: // %b2
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: {
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: } :endloop0
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; CHECK-NEXT: // %bb.2: // %b3
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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b0:
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br label %b1
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
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%v1 = add nsw i32 %v0, 3
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%v2 = icmp slt i32 %v1, 3
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br i1 %v2, label %b2, label %b3
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b3: ; preds = %b2
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ret void
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}
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define void @f3(ptr nocapture %a0, i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f3:
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; CHECK: // %bb.0: // %b0
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; CHECK-NEXT: {
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; CHECK-NEXT: loop0(.LBB3_1,#4)
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; CHECK-NEXT: }
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB3_1: // Block address taken
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; CHECK-NEXT: // %b2
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: {
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: } :endloop0
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; CHECK-NEXT: // %bb.2: // %b3
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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b0:
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br label %b1
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
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%v1 = add nsw i32 %v0, 1
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%v2 = icmp sle i32 %v1, 3
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br i1 %v2, label %b2, label %b3
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b3: ; preds = %b2
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ret void
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}
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define void @f4(ptr nocapture %a0, i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f4:
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; CHECK: // %bb.0: // %b0
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; CHECK-NEXT: {
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; CHECK-NEXT: loop0(.LBB4_1,#2)
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; CHECK-NEXT: }
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB4_1: // Block address taken
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; CHECK-NEXT: // %b2
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: {
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: } :endloop0
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; CHECK-NEXT: // %bb.2: // %b3
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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b0:
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br label %b1
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
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%v1 = add nsw i32 %v0, 2
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%v2 = icmp sle i32 %v1, 3
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br i1 %v2, label %b2, label %b3
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b3: ; preds = %b2
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ret void
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}
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define void @f5(ptr nocapture %a0, i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f5:
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; CHECK: // %bb.0: // %b0
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; CHECK-NEXT: {
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; CHECK-NEXT: loop0(.LBB5_1,#2)
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; CHECK-NEXT: }
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB5_1: // Block address taken
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; CHECK-NEXT: // %b2
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: {
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: } :endloop0
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; CHECK-NEXT: // %bb.2: // %b3
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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b0:
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br label %b1
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
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%v1 = add nsw i32 %v0, 3
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%v2 = icmp sle i32 %v1, 3
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br i1 %v2, label %b2, label %b3
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b3: ; preds = %b2
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ret void
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}
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attributes #0 = { nounwind }
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