c04857cb2c
This pass utilizes the new Hexagon Mask Instruction. Authored by : Harsha Jagasia, Krzysztof Parzyszek Co-authored-by: Harsha Jagasia <harsha.jagasia@gmail.com> Co-authored-by: Krzysztof Parzyszek <Krzysztof.Parzyszek@amd.com>
18 lines
376 B
LLVM
18 lines
376 B
LLVM
; RUN: llc -mtriple=hexagon -mcpu=hexagonv73 < %s | FileCheck %s
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target triple = "hexagon"
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; CHECK-LABEL: test1:
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; CHECK: r0 = mask(#25,#2)
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; Function Attrs: optsize
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define i32 @test1() #1 {
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entry:
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%0 = call i32 @llvm.hexagon.A2.tfr(i32 134217724)
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ret i32 %0
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}
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declare i32 @llvm.hexagon.A2.tfr(i32) #0
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attributes #0 = { nounwind readnone }
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attributes #1 = { optsize }
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