c9cc782e0b
This patch adds support for PC-relative address materialization using pcadd-class relocations, covering the HI20/LO12 pair and their GOT and TLS variants (IE, LD, GD, and DESC). Link: https://gcc.gnu.org/pipermail/gcc-patches/2025-December/703312.html
158 lines
5.4 KiB
LLVM
158 lines
5.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=0 < %s | FileCheck %s --check-prefixes=LA32,LA32-0
|
|
; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=2 < %s | FileCheck %s --check-prefixes=LA32,LA32-2
|
|
; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=3 < %s | FileCheck %s --check-prefixes=LA32,LA32-3
|
|
; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=4 < %s | FileCheck %s --check-prefixes=LA32,LA32-3
|
|
; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=5 < %s | FileCheck %s --check-prefixes=LA32,LA32-3
|
|
; RUN: llc --mtriple=loongarch32 --mattr=+f,-d -loongarch-materialize-float-imm=6 < %s | FileCheck %s --check-prefixes=LA32,LA32-3
|
|
; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=0 < %s | FileCheck %s --check-prefixes=LA64,LA64-0
|
|
; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=2 < %s | FileCheck %s --check-prefixes=LA64,LA64-2
|
|
; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=3 < %s | FileCheck %s --check-prefixes=LA64,LA64-3
|
|
; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=4 < %s | FileCheck %s --check-prefixes=LA64,LA64-3
|
|
; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=5 < %s | FileCheck %s --check-prefixes=LA64,LA64-3
|
|
; RUN: llc --mtriple=loongarch64 --mattr=+f,-d -loongarch-materialize-float-imm=6 < %s | FileCheck %s --check-prefixes=LA64,LA64-3
|
|
|
|
define float @f32_positive_zero() nounwind {
|
|
; LA32-LABEL: f32_positive_zero:
|
|
; LA32: # %bb.0:
|
|
; LA32-NEXT: movgr2fr.w $fa0, $zero
|
|
; LA32-NEXT: ret
|
|
;
|
|
; LA64-LABEL: f32_positive_zero:
|
|
; LA64: # %bb.0:
|
|
; LA64-NEXT: movgr2fr.w $fa0, $zero
|
|
; LA64-NEXT: ret
|
|
ret float 0.0
|
|
}
|
|
|
|
define float @f32_negative_zero() nounwind {
|
|
; LA32-LABEL: f32_negative_zero:
|
|
; LA32: # %bb.0:
|
|
; LA32-NEXT: movgr2fr.w $fa0, $zero
|
|
; LA32-NEXT: fneg.s $fa0, $fa0
|
|
; LA32-NEXT: ret
|
|
;
|
|
; LA64-LABEL: f32_negative_zero:
|
|
; LA64: # %bb.0:
|
|
; LA64-NEXT: movgr2fr.w $fa0, $zero
|
|
; LA64-NEXT: fneg.s $fa0, $fa0
|
|
; LA64-NEXT: ret
|
|
ret float -0.0
|
|
}
|
|
|
|
define float @f32_constant_ins1() nounwind {
|
|
; LA32-0-LABEL: f32_constant_ins1:
|
|
; LA32-0: # %bb.0:
|
|
; LA32-0-NEXT: .Lpcadd_hi0:
|
|
; LA32-0-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI2_0)
|
|
; LA32-0-NEXT: fld.s $fa0, $a0, %pcadd_lo12(.Lpcadd_hi0)
|
|
; LA32-0-NEXT: ret
|
|
;
|
|
; LA32-2-LABEL: f32_constant_ins1:
|
|
; LA32-2: # %bb.0:
|
|
; LA32-2-NEXT: lu12i.w $a0, 270336
|
|
; LA32-2-NEXT: movgr2fr.w $fa0, $a0
|
|
; LA32-2-NEXT: ret
|
|
;
|
|
; LA32-3-LABEL: f32_constant_ins1:
|
|
; LA32-3: # %bb.0:
|
|
; LA32-3-NEXT: lu12i.w $a0, 270336
|
|
; LA32-3-NEXT: movgr2fr.w $fa0, $a0
|
|
; LA32-3-NEXT: ret
|
|
;
|
|
; LA64-0-LABEL: f32_constant_ins1:
|
|
; LA64-0: # %bb.0:
|
|
; LA64-0-NEXT: pcalau12i $a0, %pc_hi20(.LCPI2_0)
|
|
; LA64-0-NEXT: fld.s $fa0, $a0, %pc_lo12(.LCPI2_0)
|
|
; LA64-0-NEXT: ret
|
|
;
|
|
; LA64-2-LABEL: f32_constant_ins1:
|
|
; LA64-2: # %bb.0:
|
|
; LA64-2-NEXT: lu12i.w $a0, 270336
|
|
; LA64-2-NEXT: movgr2fr.w $fa0, $a0
|
|
; LA64-2-NEXT: ret
|
|
;
|
|
; LA64-3-LABEL: f32_constant_ins1:
|
|
; LA64-3: # %bb.0:
|
|
; LA64-3-NEXT: lu12i.w $a0, 270336
|
|
; LA64-3-NEXT: movgr2fr.w $fa0, $a0
|
|
; LA64-3-NEXT: ret
|
|
ret float 32.0
|
|
}
|
|
|
|
define float @f32_constant_pi() nounwind {
|
|
; LA32-0-LABEL: f32_constant_pi:
|
|
; LA32-0: # %bb.0:
|
|
; LA32-0-NEXT: .Lpcadd_hi1:
|
|
; LA32-0-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI3_0)
|
|
; LA32-0-NEXT: fld.s $fa0, $a0, %pcadd_lo12(.Lpcadd_hi1)
|
|
; LA32-0-NEXT: ret
|
|
;
|
|
; LA32-2-LABEL: f32_constant_pi:
|
|
; LA32-2: # %bb.0:
|
|
; LA32-2-NEXT: .Lpcadd_hi0:
|
|
; LA32-2-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI3_0)
|
|
; LA32-2-NEXT: fld.s $fa0, $a0, %pcadd_lo12(.Lpcadd_hi0)
|
|
; LA32-2-NEXT: ret
|
|
;
|
|
; LA32-3-LABEL: f32_constant_pi:
|
|
; LA32-3: # %bb.0:
|
|
; LA32-3-NEXT: lu12i.w $a0, 263312
|
|
; LA32-3-NEXT: ori $a0, $a0, 4059
|
|
; LA32-3-NEXT: movgr2fr.w $fa0, $a0
|
|
; LA32-3-NEXT: ret
|
|
;
|
|
; LA64-0-LABEL: f32_constant_pi:
|
|
; LA64-0: # %bb.0:
|
|
; LA64-0-NEXT: pcalau12i $a0, %pc_hi20(.LCPI3_0)
|
|
; LA64-0-NEXT: fld.s $fa0, $a0, %pc_lo12(.LCPI3_0)
|
|
; LA64-0-NEXT: ret
|
|
;
|
|
; LA64-2-LABEL: f32_constant_pi:
|
|
; LA64-2: # %bb.0:
|
|
; LA64-2-NEXT: pcalau12i $a0, %pc_hi20(.LCPI3_0)
|
|
; LA64-2-NEXT: fld.s $fa0, $a0, %pc_lo12(.LCPI3_0)
|
|
; LA64-2-NEXT: ret
|
|
;
|
|
; LA64-3-LABEL: f32_constant_pi:
|
|
; LA64-3: # %bb.0:
|
|
; LA64-3-NEXT: lu12i.w $a0, 263312
|
|
; LA64-3-NEXT: ori $a0, $a0, 4059
|
|
; LA64-3-NEXT: movgr2fr.w $fa0, $a0
|
|
; LA64-3-NEXT: ret
|
|
ret float 3.14159274101257324218750
|
|
}
|
|
|
|
define float @f32_add_fimm1(float %a) nounwind {
|
|
; LA32-LABEL: f32_add_fimm1:
|
|
; LA32: # %bb.0:
|
|
; LA32-NEXT: lu12i.w $a0, 260096
|
|
; LA32-NEXT: movgr2fr.w $fa1, $a0
|
|
; LA32-NEXT: fadd.s $fa0, $fa0, $fa1
|
|
; LA32-NEXT: ret
|
|
;
|
|
; LA64-LABEL: f32_add_fimm1:
|
|
; LA64: # %bb.0:
|
|
; LA64-NEXT: lu12i.w $a0, 260096
|
|
; LA64-NEXT: movgr2fr.w $fa1, $a0
|
|
; LA64-NEXT: fadd.s $fa0, $fa0, $fa1
|
|
; LA64-NEXT: ret
|
|
%1 = fadd float %a, 1.0
|
|
ret float %1
|
|
}
|
|
|
|
define float @f32_positive_fimm1() nounwind {
|
|
; LA32-LABEL: f32_positive_fimm1:
|
|
; LA32: # %bb.0:
|
|
; LA32-NEXT: lu12i.w $a0, 260096
|
|
; LA32-NEXT: movgr2fr.w $fa0, $a0
|
|
; LA32-NEXT: ret
|
|
;
|
|
; LA64-LABEL: f32_positive_fimm1:
|
|
; LA64: # %bb.0:
|
|
; LA64-NEXT: lu12i.w $a0, 260096
|
|
; LA64-NEXT: movgr2fr.w $fa0, $a0
|
|
; LA64-NEXT: ret
|
|
ret float 1.0
|
|
}
|