a789b3f381
These platforms have tests for the rest of the float sizes but not `f128`. Add them here.
150 lines
5.3 KiB
LLVM
150 lines
5.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=mips-- -mattr=+soft-float < %s | FileCheck -check-prefix=SOFT %s
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define float @ldexp_f32(i8 zeroext %x) nounwind {
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; SOFT-LABEL: ldexp_f32:
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; SOFT: # %bb.0:
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; SOFT-NEXT: addiu $sp, $sp, -24
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; SOFT-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; SOFT-NEXT: move $5, $4
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; SOFT-NEXT: jal ldexpf
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; SOFT-NEXT: lui $4, 16256
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; SOFT-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; SOFT-NEXT: jr $ra
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; SOFT-NEXT: addiu $sp, $sp, 24
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%zext = zext i8 %x to i32
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%ldexp = call float @llvm.ldexp.f32.i32(float 1.000000e+00, i32 %zext)
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ret float %ldexp
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}
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define double @ldexp_f64(i8 zeroext %x) nounwind {
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; SOFT-LABEL: ldexp_f64:
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; SOFT: # %bb.0:
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; SOFT-NEXT: addiu $sp, $sp, -24
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; SOFT-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; SOFT-NEXT: move $6, $4
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; SOFT-NEXT: lui $4, 16368
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; SOFT-NEXT: jal ldexp
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; SOFT-NEXT: addiu $5, $zero, 0
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; SOFT-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; SOFT-NEXT: jr $ra
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; SOFT-NEXT: addiu $sp, $sp, 24
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%zext = zext i8 %x to i32
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%ldexp = call double @llvm.ldexp.f64.i32(double 1.000000e+00, i32 %zext)
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ret double %ldexp
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}
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define <2 x float> @ldexp_v2f32(<2 x float> %val, <2 x i32> %exp) nounwind {
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; SOFT-LABEL: ldexp_v2f32:
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; SOFT: # %bb.0:
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; SOFT-NEXT: addiu $sp, $sp, -32
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; SOFT-NEXT: sw $ra, 28($sp) # 4-byte Folded Spill
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; SOFT-NEXT: sw $17, 24($sp) # 4-byte Folded Spill
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; SOFT-NEXT: sw $16, 20($sp) # 4-byte Folded Spill
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; SOFT-NEXT: move $16, $6
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; SOFT-NEXT: move $17, $4
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; SOFT-NEXT: lw $5, 52($sp)
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; SOFT-NEXT: jal ldexpf
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; SOFT-NEXT: move $4, $7
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; SOFT-NEXT: lw $5, 48($sp)
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; SOFT-NEXT: sw $2, 4($17)
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; SOFT-NEXT: jal ldexpf
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; SOFT-NEXT: move $4, $16
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; SOFT-NEXT: sw $2, 0($17)
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; SOFT-NEXT: lw $16, 20($sp) # 4-byte Folded Reload
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; SOFT-NEXT: lw $17, 24($sp) # 4-byte Folded Reload
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; SOFT-NEXT: lw $ra, 28($sp) # 4-byte Folded Reload
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; SOFT-NEXT: jr $ra
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; SOFT-NEXT: addiu $sp, $sp, 32
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%1 = call <2 x float> @llvm.ldexp.v2f32.v2i32(<2 x float> %val, <2 x i32> %exp)
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ret <2 x float> %1
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}
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define <4 x float> @ldexp_v4f32(<4 x float> %val, <4 x i32> %exp) nounwind {
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; SOFT-LABEL: ldexp_v4f32:
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; SOFT: # %bb.0:
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; SOFT-NEXT: addiu $sp, $sp, -40
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; SOFT-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill
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; SOFT-NEXT: sw $20, 32($sp) # 4-byte Folded Spill
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; SOFT-NEXT: sw $19, 28($sp) # 4-byte Folded Spill
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; SOFT-NEXT: sw $18, 24($sp) # 4-byte Folded Spill
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; SOFT-NEXT: sw $17, 20($sp) # 4-byte Folded Spill
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; SOFT-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
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; SOFT-NEXT: move $16, $7
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; SOFT-NEXT: move $18, $4
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; SOFT-NEXT: lw $4, 60($sp)
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; SOFT-NEXT: lw $5, 76($sp)
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; SOFT-NEXT: jal ldexpf
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; SOFT-NEXT: move $17, $6
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; SOFT-NEXT: lw $19, 64($sp)
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; SOFT-NEXT: lw $20, 68($sp)
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; SOFT-NEXT: lw $5, 72($sp)
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; SOFT-NEXT: lw $4, 56($sp)
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; SOFT-NEXT: jal ldexpf
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; SOFT-NEXT: sw $2, 12($18)
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; SOFT-NEXT: sw $2, 8($18)
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; SOFT-NEXT: move $4, $16
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; SOFT-NEXT: jal ldexpf
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; SOFT-NEXT: move $5, $20
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; SOFT-NEXT: sw $2, 4($18)
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; SOFT-NEXT: move $4, $17
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; SOFT-NEXT: jal ldexpf
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; SOFT-NEXT: move $5, $19
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; SOFT-NEXT: sw $2, 0($18)
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; SOFT-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
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; SOFT-NEXT: lw $17, 20($sp) # 4-byte Folded Reload
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; SOFT-NEXT: lw $18, 24($sp) # 4-byte Folded Reload
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; SOFT-NEXT: lw $19, 28($sp) # 4-byte Folded Reload
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; SOFT-NEXT: lw $20, 32($sp) # 4-byte Folded Reload
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; SOFT-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload
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; SOFT-NEXT: jr $ra
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; SOFT-NEXT: addiu $sp, $sp, 40
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%1 = call <4 x float> @llvm.ldexp.v4f32.v4i32(<4 x float> %val, <4 x i32> %exp)
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ret <4 x float> %1
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}
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define half @ldexp_f16(half %arg0, i32 %arg1) nounwind {
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; SOFT-LABEL: ldexp_f16:
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; SOFT: # %bb.0:
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; SOFT-NEXT: addiu $sp, $sp, -24
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; SOFT-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; SOFT-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
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; SOFT-NEXT: move $16, $5
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; SOFT-NEXT: jal __extendhfsf2
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; SOFT-NEXT: andi $4, $4, 65535
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; SOFT-NEXT: move $4, $2
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; SOFT-NEXT: jal ldexpf
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; SOFT-NEXT: move $5, $16
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; SOFT-NEXT: jal __truncsfhf2
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; SOFT-NEXT: move $4, $2
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; SOFT-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
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; SOFT-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; SOFT-NEXT: jr $ra
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; SOFT-NEXT: addiu $sp, $sp, 24
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%ldexp = call half @llvm.ldexp.f16.i32(half %arg0, i32 %arg1)
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ret half %ldexp
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}
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define fp128 @ldexp_f128(fp128 %arg0, i32 %arg1) nounwind {
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; SOFT-LABEL: ldexp_f128:
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; SOFT: # %bb.0:
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; SOFT-NEXT: addiu $sp, $sp, -32
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; SOFT-NEXT: sw $ra, 28($sp) # 4-byte Folded Spill
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; SOFT-NEXT: lw $1, 48($sp)
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; SOFT-NEXT: jal ldexpl
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; SOFT-NEXT: sw $1, 16($sp)
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; SOFT-NEXT: lw $ra, 28($sp) # 4-byte Folded Reload
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; SOFT-NEXT: jr $ra
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; SOFT-NEXT: addiu $sp, $sp, 32
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%ldexp = call fp128 @llvm.ldexp.f128.i32(fp128 %arg0, i32 %arg1)
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ret fp128 %ldexp
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}
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declare double @llvm.ldexp.f64.i32(double, i32) #0
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declare float @llvm.ldexp.f32.i32(float, i32) #0
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declare <2 x float> @llvm.ldexp.v2f32.v2i32(<2 x float>, <2 x i32>) #0
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declare <4 x float> @llvm.ldexp.v4f32.v4i32(<4 x float>, <4 x i32>) #0
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declare half @llvm.ldexp.f16.i32(half, i32) #0
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attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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