6962cf1700
This is meant as a preparation for PR #130988 "[AMDGPU] Implement IR expansion for frem instruction" which implements the expansion of another instruction in this pass. The more general name seems more appropriate given this change and quite reasonable even without it.
80 lines
3.6 KiB
LLVM
80 lines
3.6 KiB
LLVM
; RUN: llc --debugify-and-strip-all-safe=0 -mtriple=powerpc64-- -O0 \
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; RUN: -debug-pass=Structure < %s -o /dev/null 2>&1 | \
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; RUN: grep -v "Verify generated machine code" | FileCheck %s
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; REQUIRES: asserts
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; CHECK-LABEL: Pass Arguments:
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; CHECK-NEXT: Target Library Information
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; CHECK-NEXT: Target Pass Configuration
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; CHECK-NEXT: Machine Module Information
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; CHECK-NEXT: Target Transform Information
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; CHECK-NEXT: Create Garbage Collector Module Metadata
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; CHECK-NEXT: Assumption Cache Tracker
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; CHECK-NEXT: Profile summary info
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; CHECK-NEXT: Machine Branch Probability Analysis
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; CHECK-NEXT: ModulePass Manager
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; CHECK-NEXT: Pre-ISel Intrinsic Lowering
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; CHECK-NEXT: FunctionPass Manager
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; CHECK-NEXT: Expand large div/rem
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; CHECK-NEXT: Expand fp
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; CHECK-NEXT: Expand Atomic instructions
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; CHECK-NEXT: PPC Lower MASS Entries
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; CHECK-NEXT: FunctionPass Manager
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; CHECK-NEXT: Module Verifier
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; CHECK-NEXT: Lower Garbage Collection Instructions
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; CHECK-NEXT: Shadow Stack GC Lowering
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; CHECK-NEXT: Remove unreachable blocks from the CFG
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; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)
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; CHECK-NEXT: Scalarize Masked Memory Intrinsics
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; CHECK-NEXT: Expand reduction intrinsics
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; CHECK-NEXT: Exception handling preparation
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; CHECK-NEXT: Prepare callbr
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; CHECK-NEXT: Safe Stack instrumentation pass
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; CHECK-NEXT: Insert stack protectors
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; CHECK-NEXT: Module Verifier
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; CHECK-NEXT: Assignment Tracking Analysis
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; CHECK-NEXT: PowerPC DAG->DAG Pattern Instruction Selection
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; CHECK-NEXT: PowerPC VSX Copy Legalization
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; CHECK-NEXT: Finalize ISel and expand pseudo-instructions
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; CHECK-NEXT: Local Stack Slot Allocation
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; CHECK-NEXT: Remove unreachable machine basic blocks
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; CHECK-NEXT: Live Variable Analysis
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; CHECK-NEXT: MachineDominator Tree Construction
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; CHECK-NEXT: Slot index numbering
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; CHECK-NEXT: Live Interval Analysis
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; CHECK-NEXT: PowerPC TLS Dynamic Call Fixup
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; CHECK-NEXT: PowerPC TOC Register Dependencies
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; CHECK-NEXT: Eliminate PHI nodes for register allocation
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; CHECK-NEXT: Two-Address instruction pass
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; CHECK-NEXT: Fast Register Allocator
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; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis
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; CHECK-NEXT: Fixup Statepoint Caller Saved
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization
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; CHECK-NEXT: Post-RA pseudo instruction expansion pass
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; CHECK-NEXT: Analyze Machine Code For Garbage Collection
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; CHECK-NEXT: Insert fentry calls
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; CHECK-NEXT: Insert XRay ops
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; CHECK-NEXT: Implement the 'patchable-function' attribute
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; CHECK-NEXT: PowerPC Pre-Emit Peephole
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; CHECK-NEXT: Contiguously Lay Out Funclets
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; CHECK-NEXT: Remove Loads Into Fake Uses
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; CHECK-NEXT: StackMap Liveness Analysis
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; CHECK-NEXT: Live DEBUG_VALUE analysis
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; CHECK-NEXT: Machine Sanitizer Binary Metadata
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: Stack Frame Layout Analysis
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; CHECK-NEXT: PowerPC Expand Atomic
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; CHECK-NEXT: PowerPC Branch Selector
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: Linux PPC Assembly Printer
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; CHECK-NEXT: Free MachineFunction
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define void @f() {
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ret void
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}
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