a3efc53f16
Similar to 3f46e5453d9310b15d974e876f6132e3cf50c4b1, this patch allows the backend to produce a faster access sequence for the local-exec TLS model, where loading from the TOC can be avoided, for local-exec TLS variables that are annotated with the "aix-small-tls" attribute. The expectation is for local-exec TLS variables to be set with this attribute through PGO. Furthermore, the optimized access sequence is only generated for local-exec TLS variables annotated with "aix-small-tls", only if they are less than ~32KB in size.
223 lines
8.1 KiB
LLVM
223 lines
8.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
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; RUN: -mtriple powerpc64-ibm-aix-xcoff -mattr=-aix-small-local-exec-tls \
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; RUN: < %s | FileCheck %s --check-prefixes=COMMONCM,SMALLCM64
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
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; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large \
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; RUN: -mattr=-aix-small-local-exec-tls < %s | \
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; RUN: FileCheck %s --check-prefixes=COMMONCM,LARGECM64
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; Test that the 'aix-small-tls' global variable attribute generates the
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; optimized small-local-exec TLS sequence. Global variables without this
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; attribute should still generate a TOC-based local-exec access sequence.
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declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
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@a = thread_local(localexec) global [87 x i8] zeroinitializer, align 1 #0
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@a_noattr = thread_local(localexec) global [87 x i8] zeroinitializer, align 1
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@b = thread_local(localexec) global [87 x i16] zeroinitializer, align 2 #0
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@b_noattr = thread_local(localexec) global [87 x i16] zeroinitializer, align 2
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@c = thread_local(localexec) global [87 x i32] zeroinitializer, align 4 #0
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@c_noattr = thread_local(localexec) global [87 x i32] zeroinitializer, align 4
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@d = thread_local(localexec) global [87 x i64] zeroinitializer, align 8 #0
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@d_noattr = thread_local(localexec) global [87 x i64] zeroinitializer, align 8 #0
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@e = thread_local(localexec) global [87 x double] zeroinitializer, align 8 #0
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@e_noattr = thread_local(localexec) global [87 x double] zeroinitializer, align 8
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@f = thread_local(localexec) global [87 x float] zeroinitializer, align 4 #0
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@f_noattr = thread_local(localexec) global [87 x float] zeroinitializer, align 4
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define nonnull ptr @AddrTest1() {
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; COMMONCM-LABEL: AddrTest1:
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; COMMONCM: # %bb.0: # %entry
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; COMMONCM-NEXT: addi r3, r13, a[TL]@le+1
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; COMMONCM-NEXT: blr
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entry:
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%tls0 = tail call align 1 ptr @llvm.threadlocal.address.p0(ptr align 1 @a)
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%arrayidx = getelementptr inbounds [87 x i8], ptr %tls0, i64 0, i64 1
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest1_NoAttr() {
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; SMALLCM64-LABEL: AddrTest1_NoAttr:
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; SMALLCM64: # %bb.0: # %entry
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; SMALLCM64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @a_noattr
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; SMALLCM64-NEXT: add r3, r13, r3
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; SMALLCM64-NEXT: addi r3, r3, 1
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; SMALLCM64-NEXT: blr
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;
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; LARGECM64-LABEL: AddrTest1_NoAttr:
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; LARGECM64: # %bb.0: # %entry
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; LARGECM64-NEXT: addis r3, L..C0@u(r2)
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; LARGECM64-NEXT: ld r3, L..C0@l(r3)
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; LARGECM64-NEXT: add r3, r13, r3
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; LARGECM64-NEXT: addi r3, r3, 1
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; LARGECM64-NEXT: blr
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entry:
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%tls0 = tail call align 1 ptr @llvm.threadlocal.address.p0(ptr align 1 @a_noattr)
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%arrayidx = getelementptr inbounds [87 x i8], ptr %tls0, i64 0, i64 1
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest2() {
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; COMMONCM-LABEL: AddrTest2:
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; COMMONCM: # %bb.0: # %entry
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; COMMONCM-NEXT: addi r3, r13, b[TL]@le+4
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; COMMONCM-NEXT: blr
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entry:
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%tls0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @b)
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%arrayidx = getelementptr inbounds [87 x i16], ptr %tls0, i64 0, i64 2
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest2_NoAttr() {
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; SMALLCM64-LABEL: AddrTest2_NoAttr:
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; SMALLCM64: # %bb.0: # %entry
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; SMALLCM64-NEXT: ld r3, L..C1(r2) # target-flags(ppc-tprel) @b_noattr
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; SMALLCM64-NEXT: add r3, r13, r3
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; SMALLCM64-NEXT: addi r3, r3, 4
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; SMALLCM64-NEXT: blr
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;
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; LARGECM64-LABEL: AddrTest2_NoAttr:
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; LARGECM64: # %bb.0: # %entry
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; LARGECM64-NEXT: addis r3, L..C1@u(r2)
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; LARGECM64-NEXT: ld r3, L..C1@l(r3)
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; LARGECM64-NEXT: add r3, r13, r3
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; LARGECM64-NEXT: addi r3, r3, 4
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; LARGECM64-NEXT: blr
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entry:
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%tls0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @b_noattr)
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%arrayidx = getelementptr inbounds [87 x i16], ptr %tls0, i64 0, i64 2
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest3() {
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; COMMONCM-LABEL: AddrTest3:
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; COMMONCM: # %bb.0: # %entry
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; COMMONCM-NEXT: addi r3, r13, c[TL]@le+12
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; COMMONCM-NEXT: blr
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entry:
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%tls0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @c)
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%arrayidx = getelementptr inbounds [87 x i32], ptr %tls0, i64 0, i64 3
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest3_NoAttr() {
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; SMALLCM64-LABEL: AddrTest3_NoAttr:
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; SMALLCM64: # %bb.0: # %entry
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; SMALLCM64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @c_noattr
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; SMALLCM64-NEXT: add r3, r13, r3
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; SMALLCM64-NEXT: addi r3, r3, 12
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; SMALLCM64-NEXT: blr
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;
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; LARGECM64-LABEL: AddrTest3_NoAttr:
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; LARGECM64: # %bb.0: # %entry
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; LARGECM64-NEXT: addis r3, L..C2@u(r2)
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; LARGECM64-NEXT: ld r3, L..C2@l(r3)
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; LARGECM64-NEXT: add r3, r13, r3
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; LARGECM64-NEXT: addi r3, r3, 12
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; LARGECM64-NEXT: blr
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entry:
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%tls0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @c_noattr)
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%arrayidx = getelementptr inbounds [87 x i32], ptr %tls0, i64 0, i64 3
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest4() {
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; COMMONCM-LABEL: AddrTest4:
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; COMMONCM: # %bb.0: # %entry
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; COMMONCM-NEXT: addi r3, r13, c[TL]@le+56
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; COMMONCM-NEXT: blr
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entry:
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%tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @c)
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%arrayidx = getelementptr inbounds [87 x i64], ptr %tls0, i64 0, i64 7
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest4_NoAttr() {
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; SMALLCM64-LABEL: AddrTest4_NoAttr:
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; SMALLCM64: # %bb.0: # %entry
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; SMALLCM64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @c_noattr
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; SMALLCM64-NEXT: add r3, r13, r3
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; SMALLCM64-NEXT: addi r3, r3, 56
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; SMALLCM64-NEXT: blr
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;
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; LARGECM64-LABEL: AddrTest4_NoAttr:
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; LARGECM64: # %bb.0: # %entry
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; LARGECM64-NEXT: addis r3, L..C2@u(r2)
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; LARGECM64-NEXT: ld r3, L..C2@l(r3)
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; LARGECM64-NEXT: add r3, r13, r3
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; LARGECM64-NEXT: addi r3, r3, 56
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; LARGECM64-NEXT: blr
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entry:
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%tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @c_noattr)
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%arrayidx = getelementptr inbounds [87 x i64], ptr %tls0, i64 0, i64 7
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest5() {
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; COMMONCM-LABEL: AddrTest5:
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; COMMONCM: # %bb.0: # %entry
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; COMMONCM-NEXT: addi r3, r13, e[TL]@le+48
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; COMMONCM-NEXT: blr
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entry:
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%tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @e)
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%arrayidx = getelementptr inbounds [87 x double], ptr %tls0, i64 0, i64 6
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest5_NoAttr() {
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; SMALLCM64-LABEL: AddrTest5_NoAttr:
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; SMALLCM64: # %bb.0: # %entry
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; SMALLCM64-NEXT: ld r3, L..C3(r2) # target-flags(ppc-tprel) @e_noattr
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; SMALLCM64-NEXT: add r3, r13, r3
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; SMALLCM64-NEXT: addi r3, r3, 48
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; SMALLCM64-NEXT: blr
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;
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; LARGECM64-LABEL: AddrTest5_NoAttr:
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; LARGECM64: # %bb.0: # %entry
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; LARGECM64-NEXT: addis r3, L..C3@u(r2)
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; LARGECM64-NEXT: ld r3, L..C3@l(r3)
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; LARGECM64-NEXT: add r3, r13, r3
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; LARGECM64-NEXT: addi r3, r3, 48
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; LARGECM64-NEXT: blr
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entry:
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%tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @e_noattr)
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%arrayidx = getelementptr inbounds [87 x double], ptr %tls0, i64 0, i64 6
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest6() {
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; COMMONCM-LABEL: AddrTest6:
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; COMMONCM: # %bb.0: # %entry
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; COMMONCM-NEXT: addi r3, r13, f[TL]@le+16
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; COMMONCM-NEXT: blr
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entry:
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%tls0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @f)
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%arrayidx = getelementptr inbounds [87 x float], ptr %tls0, i64 0, i64 4
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ret ptr %arrayidx
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}
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define nonnull ptr @AddrTest6_NoAttr() {
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; SMALLCM64-LABEL: AddrTest6_NoAttr:
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; SMALLCM64: # %bb.0: # %entry
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; SMALLCM64-NEXT: ld r3, L..C4(r2) # target-flags(ppc-tprel) @f_noattr
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; SMALLCM64-NEXT: add r3, r13, r3
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; SMALLCM64-NEXT: addi r3, r3, 16
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; SMALLCM64-NEXT: blr
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;
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; LARGECM64-LABEL: AddrTest6_NoAttr:
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; LARGECM64: # %bb.0: # %entry
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; LARGECM64-NEXT: addis r3, L..C4@u(r2)
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; LARGECM64-NEXT: ld r3, L..C4@l(r3)
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; LARGECM64-NEXT: add r3, r13, r3
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; LARGECM64-NEXT: addi r3, r3, 16
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; LARGECM64-NEXT: blr
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entry:
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%tls0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @f_noattr)
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%arrayidx = getelementptr inbounds [87 x float], ptr %tls0, i64 0, i64 4
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ret ptr %arrayidx
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}
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attributes #0 = { "aix-small-tls" }
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