
The existing pretty printer generates excessive parentheses for MCBinaryExpr expressions. This update removes unnecessary parentheses of MCBinaryExpr with +/- operators and MCUnaryExpr. Since relocatable expressions only use + and -, this change improves readability in most cases. Examples: - (SymA - SymB) + C now prints as SymA - SymB + C. This updates the output of -fexperimental-relative-c++-abi-vtables for AArch64 and x86 to `.long _ZN1B3fooEv@PLT-_ZTV1B-8` - expr + (MCTargetExpr) now prints as expr + MCTargetExpr, with this change primarily affecting AMDGPUMCExpr.
54 lines
2.8 KiB
LLVM
54 lines
2.8 KiB
LLVM
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
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; RUN: -mtriple powerpc64-ibm-aix-xcoff -mattr=+aix-small-local-exec-tls < %s \
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; RUN: | FileCheck %s --check-prefixes=COMMONCM,SMALL-LOCAL-EXEC-SMALLCM64
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
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; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large \
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; RUN: -mattr=+aix-small-local-exec-tls < %s | FileCheck %s \
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; RUN: --check-prefixes=COMMONCM,SMALL-LOCAL-EXEC-LARGECM64
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@mySmallTLS = thread_local(localexec) global [7800 x i64] zeroinitializer, align 8 #0
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@mySmallTLS2 = thread_local(localexec) global [3000 x i64] zeroinitializer, align 8 #0
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@mySmallTLS3 = thread_local(localexec) global [3000 x i64] zeroinitializer, align 8
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declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
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; Although some global variables are annotated with 'aix-small-tls', because the
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; aix-small-local-exec-tls target attribute is turned on, all accesses will use
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; a "faster" local-exec sequence directly off the thread pointer.
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define i64 @StoreLargeAccess1() {
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; COMMONCM-LABEL: StoreLargeAccess1:
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; COMMONCM-NEXT: # %bb.0: # %entry
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; SMALL-LOCAL-EXEC-SMALLCM64: ld r3, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
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; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: li r4, 0
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; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: li r5, 23
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; SMALL-LOCAL-EXEC-LARGECM64: addis r3, L..C0@u(r2)
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; SMALL-LOCAL-EXEC-LARGECM64-NEXT: li r4, 0
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; SMALL-LOCAL-EXEC-LARGECM64-NEXT: li r5, 23
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; SMALL-LOCAL-EXEC-LARGECM64-NEXT: ld r3, L..C0@l(r3)
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; COMMONCM: ori r4, r4, 53328
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; COMMONCM-NEXT: add r3, r13, r3
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; COMMONCM-NEXT: stdx r5, r3, r4
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; COMMONCM-NEXT: li r3, 55
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; COMMONCM-NEXT: li r4, 64
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; COMMONCM-NEXT: std r3, mySmallTLS2[TL]@le+696-65536(r13)
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; COMMONCM-NEXT: li r3, 142
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; COMMONCM-NEXT: std r4, mySmallTLS3[TL]@le+20000-131072(r13)
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; COMMONCM-NEXT: blr
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entry:
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%tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS)
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%arrayidx = getelementptr inbounds i8, ptr %tls0, i32 53328
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store i64 23, ptr %arrayidx, align 8
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%tls1 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS2)
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%arrayidx1 = getelementptr inbounds i8, ptr %tls1, i32 696
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store i64 55, ptr %arrayidx1, align 8
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%tls2 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS3)
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%arrayidx2 = getelementptr inbounds i8, ptr %tls2, i32 20000
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store i64 64, ptr %arrayidx2, align 8
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%load1 = load i64, ptr %arrayidx, align 8
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%load2 = load i64, ptr %arrayidx1, align 8
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%add1 = add i64 %load1, 64
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%add2 = add i64 %add1, %load2
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ret i64 %add2
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}
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attributes #0 = { "aix-small-tls" }
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