1492c88f49
This patch fixes the following two bugs in `PPCInstrInfo::isSignOrZeroExtended` helper, which is used from sign-/zero-extension elimination in PPCMIPeephole pass. - Registers defined by load with update (e.g. LBZU) were identified as already sign or zero-extended. But it is true only for the first def (loaded value) and not for the second def (i.e. updated pointer). - Registers defined by ORIS/XORIS were identified as already sign-extended. But, it is not true for sign extension depending on the immediate (while it is ok for zero extension). To handle the first case, the parameter for the helpers is changed from `MachineInstr` to a register number to distinguish first and second defs. Also, this patch moves the initialization of PPCMIPeepholePass to allow mir test case. Reviewed By: nemanjai Differential Revision: https://reviews.llvm.org/D40554
197 lines
6.3 KiB
LLVM
197 lines
6.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names \
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; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names \
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; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-P9
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define dso_local i64 @test_invalid(<16 x i8> %a) local_unnamed_addr #0 {
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; CHECK-LABEL: test_invalid:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdsub. v2, v2, v2, 0
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; CHECK-NEXT: setbc r3, 4*cr6+un
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; CHECK-NEXT: blr
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;
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; CHECK-P9-LABEL: test_invalid:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: bcdsub. v2, v2, v2, 0
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; CHECK-P9-NEXT: mfocrf r3, 2
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; CHECK-P9-NEXT: rlwinm r3, r3, 28, 31, 31
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; CHECK-P9-NEXT: blr
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entry:
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%0 = tail call i32 @llvm.ppc.bcdsub.p(i32 6, <16 x i8> %a, <16 x i8> %a) #2
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%conv.i = sext i32 %0 to i64
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ret i64 %conv.i
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}
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define dso_local <16 x i8> @test_add(<16 x i8> %a, <16 x i8> %b, i64 %ps) local_unnamed_addr #0 {
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; CHECK-LABEL: test_add:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdadd. v2, v2, v3, 1
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; CHECK-NEXT: blr
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;
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; CHECK-P9-LABEL: test_add:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: bcdadd. v2, v2, v3, 1
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; CHECK-P9-NEXT: blr
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entry:
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%0 = tail call <16 x i8> @llvm.ppc.bcdadd(<16 x i8> %a, <16 x i8> %b, i32 1)
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ret <16 x i8> %0
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}
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define dso_local i64 @test_add_ofl(<16 x i8> %a, <16 x i8> %b, i64 %ps) local_unnamed_addr #0 {
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; CHECK-LABEL: test_add_ofl:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdadd. v2, v2, v3, 0
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; CHECK-NEXT: setbc r3, 4*cr6+un
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; CHECK-NEXT: blr
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;
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; CHECK-P9-LABEL: test_add_ofl:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: bcdadd. v2, v2, v3, 0
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; CHECK-P9-NEXT: mfocrf r3, 2
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; CHECK-P9-NEXT: rlwinm r3, r3, 28, 31, 31
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; CHECK-P9-NEXT: blr
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entry:
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%0 = tail call i32 @llvm.ppc.bcdadd.p(i32 6, <16 x i8> %a, <16 x i8> %b) #2
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%conv.i = sext i32 %0 to i64
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ret i64 %conv.i
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}
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define dso_local <16 x i8> @test_sub(<16 x i8> %a, <16 x i8> %b, i64 %ps) local_unnamed_addr #0 {
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; CHECK-LABEL: test_sub:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-NEXT: blr
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;
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; CHECK-P9-LABEL: test_sub:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-P9-NEXT: blr
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entry:
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%0 = tail call <16 x i8> @llvm.ppc.bcdsub(<16 x i8> %a, <16 x i8> %b, i32 0)
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ret <16 x i8> %0
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}
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define dso_local i64 @test_sub_ofl(<16 x i8> %a, <16 x i8> %b, i64 %ps) local_unnamed_addr #0 {
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; CHECK-LABEL: test_sub_ofl:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-NEXT: setbc r3, 4*cr6+un
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; CHECK-NEXT: blr
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;
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; CHECK-P9-LABEL: test_sub_ofl:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-P9-NEXT: mfocrf r3, 2
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; CHECK-P9-NEXT: rlwinm r3, r3, 28, 31, 31
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; CHECK-P9-NEXT: blr
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entry:
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%0 = tail call i32 @llvm.ppc.bcdsub.p(i32 6, <16 x i8> %a, <16 x i8> %b) #2
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%conv.i = sext i32 %0 to i64
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ret i64 %conv.i
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}
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define dso_local i64 @test_cmplt(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-LABEL: test_cmplt:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-NEXT: setbc r3, 4*cr6+lt
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; CHECK-NEXT: blr
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;
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; CHECK-P9-LABEL: test_cmplt:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-P9-NEXT: mfocrf r3, 2
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; CHECK-P9-NEXT: rlwinm r3, r3, 25, 31, 31
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; CHECK-P9-NEXT: blr
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entry:
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%0 = tail call i32 @llvm.ppc.bcdsub.p(i32 2, <16 x i8> %a, <16 x i8> %b) #2
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%conv.i = sext i32 %0 to i64
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ret i64 %conv.i
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}
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define dso_local i64 @test_cmpgt(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-LABEL: test_cmpgt:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-NEXT: setbc r3, 4*cr6+gt
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; CHECK-NEXT: blr
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;
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; CHECK-P9-LABEL: test_cmpgt:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-P9-NEXT: mfocrf r3, 2
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; CHECK-P9-NEXT: rlwinm r3, r3, 26, 31, 31
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; CHECK-P9-NEXT: blr
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entry:
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%0 = tail call i32 @llvm.ppc.bcdsub.p(i32 4, <16 x i8> %a, <16 x i8> %b) #2
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%conv.i = sext i32 %0 to i64
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ret i64 %conv.i
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}
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define dso_local i64 @test_cmpeq(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-LABEL: test_cmpeq:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-NEXT: setbc r3, 4*cr6+eq
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; CHECK-NEXT: blr
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;
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; CHECK-P9-LABEL: test_cmpeq:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-P9-NEXT: mfocrf r3, 2
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; CHECK-P9-NEXT: rlwinm r3, r3, 27, 31, 31
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; CHECK-P9-NEXT: blr
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entry:
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%0 = tail call i32 @llvm.ppc.bcdsub.p(i32 0, <16 x i8> %a, <16 x i8> %b) #2
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%conv.i = sext i32 %0 to i64
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ret i64 %conv.i
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}
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define dso_local i64 @test_cmpge(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-LABEL: test_cmpge:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-NEXT: setbcr r3, 4*cr6+lt
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; CHECK-NEXT: blr
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;
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; CHECK-P9-LABEL: test_cmpge:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-P9-NEXT: mfocrf r3, 2
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; CHECK-P9-NEXT: rlwinm r3, r3, 25, 31, 31
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; CHECK-P9-NEXT: xori r3, r3, 1
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; CHECK-P9-NEXT: blr
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entry:
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%0 = tail call i32 @llvm.ppc.bcdsub.p(i32 3, <16 x i8> %a, <16 x i8> %b) #2
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%conv.i = sext i32 %0 to i64
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ret i64 %conv.i
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}
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define dso_local i64 @test_cmple(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-LABEL: test_cmple:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-NEXT: setbcr r3, 4*cr6+gt
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; CHECK-NEXT: blr
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;
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; CHECK-P9-LABEL: test_cmple:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0
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; CHECK-P9-NEXT: mfocrf r3, 2
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; CHECK-P9-NEXT: rlwinm r3, r3, 26, 31, 31
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; CHECK-P9-NEXT: xori r3, r3, 1
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; CHECK-P9-NEXT: blr
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entry:
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%0 = tail call i32 @llvm.ppc.bcdsub.p(i32 5, <16 x i8> %a, <16 x i8> %b) #2
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%conv.i = sext i32 %0 to i64
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ret i64 %conv.i
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}
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declare i32 @llvm.ppc.bcdsub.p(i32 immarg, <16 x i8>, <16 x i8>) #1
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declare i32 @llvm.ppc.bcdadd.p(i32 immarg, <16 x i8>, <16 x i8>) #1
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declare <16 x i8> @llvm.ppc.bcdadd(<16 x i8>, <16 x i8>, i32 immarg) #1
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declare <16 x i8> @llvm.ppc.bcdsub(<16 x i8>, <16 x i8>, i32 immarg) #1
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