427fb35192
The LIT test cases were migrated with the script provided by Nikita Popov. Due to the size of the change it is split into several parts. Reviewed By: nemanja, amyk, nikic, PowerPC Differential Revision: https://reviews.llvm.org/D135470
193 lines
5.1 KiB
LLVM
193 lines
5.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
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; RUN: -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-AIX64
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declare i64 @llvm.ppc.mfspr.i64(i32 immarg)
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declare void @llvm.ppc.mtspr.i64(i32 immarg, i64)
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@ula = external local_unnamed_addr global i64, align 8
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define dso_local i64 @test_mfxer() {
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; CHECK-LABEL: test_mfxer:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mfxer 3
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; CHECK-NEXT: blr
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;
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; CHECK-AIX64-LABEL: test_mfxer:
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; CHECK-AIX64: # %bb.0: # %entry
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; CHECK-AIX64-NEXT: mfxer 3
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; CHECK-AIX64-NEXT: blr
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entry:
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%0 = call i64 @llvm.ppc.mfspr.i64(i32 1)
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ret i64 %0
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}
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define dso_local i64 @test_mflr() {
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; CHECK-LABEL: test_mflr:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr 3
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; CHECK-NEXT: blr
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;
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; CHECK-AIX64-LABEL: test_mflr:
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; CHECK-AIX64: # %bb.0: # %entry
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; CHECK-AIX64-NEXT: mfspr 3, 8
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; CHECK-AIX64-NEXT: blr
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entry:
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%0 = call i64 @llvm.ppc.mfspr.i64(i32 8)
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ret i64 %0
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}
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define dso_local i64 @test_mfctr() {
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; CHECK-LABEL: test_mfctr:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mfctr 3
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; CHECK-NEXT: blr
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;
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; CHECK-AIX64-LABEL: test_mfctr:
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; CHECK-AIX64: # %bb.0: # %entry
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; CHECK-AIX64-NEXT: mfspr 3, 9
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; CHECK-AIX64-NEXT: blr
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entry:
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%0 = call i64 @llvm.ppc.mfspr.i64(i32 9)
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ret i64 %0
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}
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define dso_local i64 @test_mfppr() {
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; CHECK-LABEL: test_mfppr:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mfspr 3, 896
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; CHECK-NEXT: blr
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;
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; CHECK-AIX64-LABEL: test_mfppr:
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; CHECK-AIX64: # %bb.0: # %entry
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; CHECK-AIX64-NEXT: mfspr 3, 896
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; CHECK-AIX64-NEXT: blr
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entry:
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%0 = call i64 @llvm.ppc.mfspr.i64(i32 896)
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ret i64 %0
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}
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define dso_local i64 @test_mfppr32() {
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; CHECK-LABEL: test_mfppr32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mfspr 3, 898
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; CHECK-NEXT: blr
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;
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; CHECK-AIX64-LABEL: test_mfppr32:
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; CHECK-AIX64: # %bb.0: # %entry
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; CHECK-AIX64-NEXT: mfspr 3, 898
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; CHECK-AIX64-NEXT: blr
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entry:
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%0 = call i64 @llvm.ppc.mfspr.i64(i32 898)
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ret i64 %0
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}
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define dso_local void @test_mtxer() {
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; CHECK-LABEL: test_mtxer:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
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; CHECK-NEXT: ld 3, .LC0@toc@l(3)
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; CHECK-NEXT: ld 3, 0(3)
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; CHECK-NEXT: mtxer 3
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; CHECK-NEXT: blr
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;
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; CHECK-AIX64-LABEL: test_mtxer:
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; CHECK-AIX64: # %bb.0: # %entry
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; CHECK-AIX64-NEXT: ld 3, L..C0(2) # @ula
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; CHECK-AIX64-NEXT: ld 3, 0(3)
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; CHECK-AIX64-NEXT: mtxer 3
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; CHECK-AIX64-NEXT: blr
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entry:
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%0 = load i64, ptr @ula, align 8
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tail call void @llvm.ppc.mtspr.i64(i32 1, i64 %0)
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ret void
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}
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define dso_local void @test_mtlr() {
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; CHECK-LABEL: test_mtlr:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
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; CHECK-NEXT: ld 3, .LC0@toc@l(3)
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; CHECK-NEXT: ld 3, 0(3)
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; CHECK-NEXT: mtlr 3
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; CHECK-NEXT: blr
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;
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; CHECK-AIX64-LABEL: test_mtlr:
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; CHECK-AIX64: # %bb.0: # %entry
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; CHECK-AIX64-NEXT: ld 3, L..C0(2) # @ula
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; CHECK-AIX64-NEXT: ld 3, 0(3)
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; CHECK-AIX64-NEXT: mtspr 8, 3
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; CHECK-AIX64-NEXT: blr
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entry:
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%0 = load i64, ptr @ula, align 8
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tail call void @llvm.ppc.mtspr.i64(i32 8, i64 %0)
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ret void
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}
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define dso_local void @test_mtctr() {
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; CHECK-LABEL: test_mtctr:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
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; CHECK-NEXT: ld 3, .LC0@toc@l(3)
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; CHECK-NEXT: ld 3, 0(3)
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; CHECK-NEXT: mtctr 3
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; CHECK-NEXT: blr
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;
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; CHECK-AIX64-LABEL: test_mtctr:
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; CHECK-AIX64: # %bb.0: # %entry
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; CHECK-AIX64-NEXT: ld 3, L..C0(2) # @ula
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; CHECK-AIX64-NEXT: ld 3, 0(3)
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; CHECK-AIX64-NEXT: mtspr 9, 3
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; CHECK-AIX64-NEXT: blr
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entry:
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%0 = load i64, ptr @ula, align 8
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tail call void @llvm.ppc.mtspr.i64(i32 9, i64 %0)
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ret void
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}
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define dso_local void @test_mtppr() {
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; CHECK-LABEL: test_mtppr:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
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; CHECK-NEXT: ld 3, .LC0@toc@l(3)
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; CHECK-NEXT: ld 3, 0(3)
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; CHECK-NEXT: mtspr 896, 3
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; CHECK-NEXT: blr
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;
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; CHECK-AIX64-LABEL: test_mtppr:
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; CHECK-AIX64: # %bb.0: # %entry
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; CHECK-AIX64-NEXT: ld 3, L..C0(2) # @ula
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; CHECK-AIX64-NEXT: ld 3, 0(3)
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; CHECK-AIX64-NEXT: mtspr 896, 3
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; CHECK-AIX64-NEXT: blr
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entry:
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%0 = load i64, ptr @ula, align 8
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tail call void @llvm.ppc.mtspr.i64(i32 896, i64 %0)
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ret void
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}
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define dso_local void @test_mtppr32() {
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; CHECK-LABEL: test_mtppr32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
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; CHECK-NEXT: ld 3, .LC0@toc@l(3)
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; CHECK-NEXT: ld 3, 0(3)
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; CHECK-NEXT: mtspr 898, 3
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; CHECK-NEXT: blr
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;
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; CHECK-AIX64-LABEL: test_mtppr32:
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; CHECK-AIX64: # %bb.0: # %entry
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; CHECK-AIX64-NEXT: ld 3, L..C0(2) # @ula
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; CHECK-AIX64-NEXT: ld 3, 0(3)
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; CHECK-AIX64-NEXT: mtspr 898, 3
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; CHECK-AIX64-NEXT: blr
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entry:
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%0 = load i64, ptr @ula, align 8
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tail call void @llvm.ppc.mtspr.i64(i32 898, i64 %0)
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ret void
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}
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