042a6564d3
This is exposed by enabling FastIsel on 64bit AIX. We are generating XSRSP regardless of the arch, which may be wrong when -mcpu=pwr7. The fix is to guard the generation in P8 only. Reviewed By: qiucf Differential Revision: https://reviews.llvm.org/D109365
18 lines
508 B
LLVM
18 lines
508 B
LLVM
; RUN: llc -mcpu=generic -mtriple=powerpc64le-unknown-unknown -O0 < %s \
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; RUN: -verify-machineinstrs | FileCheck %s --check-prefix=GENERIC
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; RUN: llc -mcpu=ppc -mtriple=powerpc64le-unknown-unknown -O0 < %s \
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; RUN: -verify-machineinstrs | FileCheck %s
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; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-ibm-aix-xcoff -O0 < %s \
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; RUN: -verify-machineinstrs | FileCheck %s
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define float @testRSP(double %x) {
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entry:
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%0 = fptrunc double %x to float
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ret float %0
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; CHECK: frsp 1, 1
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; GENERIC: xsrsp 1, 1
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}
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