
We can decide whether to expand isel or not in instruction selection pass and early-if-conversion pass. The transformation implemented in PPCExpandISel can be retired considering PPC backend doesn't generate `isel` instructions post-RA. Also if we are seeking performant branch-or-isel decision, we can turn to selectoptimize pass. --------- Co-authored-by: Kai Luo <lkail@cn.ibm.com>
90 lines
2.4 KiB
LLVM
90 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-isel < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define signext i32 @foo(i32 signext %a, i32 signext %b) #0 {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpw 3, 4
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: li 4, 16
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; CHECK-NEXT: isellt 3, 4, 3
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; CHECK-NEXT: blr
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;
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; CHECK-NO-ISEL-LABEL: foo:
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; CHECK-NO-ISEL: # %bb.0: # %entry
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; CHECK-NO-ISEL-NEXT: cmpw 3, 4
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; CHECK-NO-ISEL-NEXT: li 3, 16
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; CHECK-NO-ISEL-NEXT: bclr 12, 0, 0
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; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
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; CHECK-NO-ISEL-NEXT: li 3, 0
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; CHECK-NO-ISEL-NEXT: blr
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entry:
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%cmp = icmp slt i32 %a, %b
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%conv = zext i1 %cmp to i32
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%shl = shl nuw nsw i32 %conv, 4
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ret i32 %shl
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}
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; Function Attrs: nounwind readnone
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define signext i32 @foo2(i32 signext %a, i32 signext %b) #0 {
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; CHECK-LABEL: foo2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpw 3, 4
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; CHECK-NEXT: li 3, 5
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; CHECK-NEXT: li 4, 21
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; CHECK-NEXT: isellt 3, 4, 3
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; CHECK-NEXT: blr
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;
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; CHECK-NO-ISEL-LABEL: foo2:
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; CHECK-NO-ISEL: # %bb.0: # %entry
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; CHECK-NO-ISEL-NEXT: cmpw 3, 4
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; CHECK-NO-ISEL-NEXT: li 3, 21
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; CHECK-NO-ISEL-NEXT: bclr 12, 0, 0
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; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
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; CHECK-NO-ISEL-NEXT: li 3, 5
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; CHECK-NO-ISEL-NEXT: blr
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entry:
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%cmp = icmp slt i32 %a, %b
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%conv = zext i1 %cmp to i32
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%shl = shl nuw nsw i32 %conv, 4
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%add1 = or i32 %shl, 5
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ret i32 %add1
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}
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; Function Attrs: nounwind readnone
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define signext i32 @foo3(i32 signext %a, i32 signext %b) #0 {
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; CHECK-LABEL: foo3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpw 3, 4
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; CHECK-NEXT: li 3, 16
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; CHECK-NEXT: iselgt 3, 0, 3
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; CHECK-NEXT: blr
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;
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; CHECK-NO-ISEL-LABEL: foo3:
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; CHECK-NO-ISEL: # %bb.0: # %entry
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; CHECK-NO-ISEL-NEXT: cmpw 3, 4
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; CHECK-NO-ISEL-NEXT: li 3, 0
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; CHECK-NO-ISEL-NEXT: bclr 12, 1, 0
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; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
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; CHECK-NO-ISEL-NEXT: li 3, 16
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; CHECK-NO-ISEL-NEXT: blr
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entry:
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%cmp = icmp sle i32 %a, %b
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%conv = zext i1 %cmp to i32
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%shl = shl nuw nsw i32 %conv, 4
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ret i32 %shl
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}
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attributes #0 = { nounwind readnone }
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