427fb35192
The LIT test cases were migrated with the script provided by Nikita Popov. Due to the size of the change it is split into several parts. Reviewed By: nemanja, amyk, nikic, PowerPC Differential Revision: https://reviews.llvm.org/D135470
89 lines
2.7 KiB
LLVM
89 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr7 -verify-machineinstrs \
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; RUN: -mtriple=powerpc-unknown-aix < %s | FileCheck %s --check-prefix=IAS32
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; RUN: llc -mcpu=pwr7 -verify-machineinstrs \
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; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix=IAS64
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; RUN: llc -mcpu=pwr7 -verify-machineinstrs -no-integrated-as \
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; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix=NOIAS
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define dso_local i32 @dollarpc() #0 {
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; IAS32-LABEL: dollarpc:
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; IAS32: # %bb.0: # %entry
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; IAS32-NEXT: li 3, 0
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; IAS32-NEXT: stw 3, -4(1)
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; IAS32-NEXT: #APP
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; IAS32-NEXT: mfspr 5, 269
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; IAS32-NEXT: mfspr 3, 268
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; IAS32-NEXT: mfspr 4, 269
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; IAS32-NEXT: cmpw 5, 4
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; IAS32-NEXT: L..tmp0:
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; IAS32-NEXT: bne 0, L..tmp0-16
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; IAS32-EMPTY:
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; IAS32-NEXT: #NO_APP
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; IAS32-NEXT: stw 3, -12(1)
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; IAS32-NEXT: stw 4, -8(1)
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; IAS32-NEXT: stw 5, -16(1)
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; IAS32-NEXT: blr
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;
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; IAS64-LABEL: dollarpc:
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; IAS64: # %bb.0: # %entry
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; IAS64-NEXT: li 3, 0
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; IAS64-NEXT: stw 3, -4(1)
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; IAS64-NEXT: #APP
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; IAS64-NEXT: mfspr 4, 269
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; IAS64-NEXT: mfspr 3, 268
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; IAS64-NEXT: mfspr 5, 269
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; IAS64-NEXT: cmpw 4, 5
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; IAS64-NEXT: L..tmp0:
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; IAS64-NEXT: bne 0, L..tmp0-16
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; IAS64-EMPTY:
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; IAS64-NEXT: #NO_APP
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; IAS64-NEXT: stw 3, -12(1)
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; IAS64-NEXT: rldimi 3, 5, 32, 0
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; IAS64-NEXT: stw 5, -8(1)
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; IAS64-NEXT: stw 4, -16(1)
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; IAS64-NEXT: blr
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;
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; NOIAS-LABEL: dollarpc:
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; NOIAS: # %bb.0: # %entry
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; NOIAS-NEXT: li 3, 0
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; NOIAS-NEXT: stw 3, -4(1)
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; NOIAS-NEXT: #APP
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; NOIAS-NEXT: mftbu 4
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; NOIAS-NEXT: mftb 3
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; NOIAS-NEXT: mftbu 5
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; NOIAS-NEXT: cmpw 4,5
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; NOIAS-NEXT: bne $-0x10
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; NOIAS-EMPTY:
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; NOIAS-NEXT: #NO_APP
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; NOIAS-NEXT: stw 3, -12(1)
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; NOIAS-NEXT: rldimi 3, 5, 32, 0
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; NOIAS-NEXT: stw 5, -8(1)
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; NOIAS-NEXT: stw 4, -16(1)
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; NOIAS-NEXT: blr
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entry:
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%retval = alloca i32, align 4
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%tbu = alloca i32, align 4
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%tbl = alloca i32, align 4
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%temp = alloca i32, align 4
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store i32 0, ptr %retval, align 4
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%0 = call { i32, i32, i32 } asm sideeffect "mftbu $2\0Amftb $0\0Amftbu $1\0Acmpw $2,$1\0Abne $$-0x10\0A", "=r,=r,=r,~{cc}"()
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%asmresult = extractvalue { i32, i32, i32 } %0, 0
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%asmresult1 = extractvalue { i32, i32, i32 } %0, 1
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%asmresult2 = extractvalue { i32, i32, i32 } %0, 2
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store i32 %asmresult, ptr %tbl, align 4
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store i32 %asmresult1, ptr %tbu, align 4
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store i32 %asmresult2, ptr %temp, align 4
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%1 = load i32, ptr %tbu, align 4
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%conv = zext i32 %1 to i64
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%shl = shl i64 %conv, 32
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%2 = load i32, ptr %tbl, align 4
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%conv3 = zext i32 %2 to i64
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%or = or i64 %shl, %conv3
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%conv4 = trunc i64 %or to i32
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ret i32 %conv4
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}
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