6615581526
`llvm.trap` is lowered to `PPC::TRAP` and `PPC::TRAP` is set as terminator. Verifier complains about terminator should not lie in the middle of an MBB. See #77095. Fix it by removing `isTerminator` and `isBarrier` and then set `isTrap` which was introduced by https://reviews.llvm.org/D48836# and is being used by X86 and AArch64. `PPC::TRAP` is not a hardware memory barrier and `llvm.trap` doesn't indicate a memory barrier either.
17 lines
490 B
LLVM
17 lines
490 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- -ppc-opt-conditional-trap \
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; RUN: < %s | FileCheck %s
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define i32 @test() {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: trap
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; CHECK-NEXT: blr
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call void @llvm.trap()
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ret i32 0
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}
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declare void @llvm.trap()
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