
This patch utilizes getReservedRegs() to find asm clobberable registers. And to make the result of getReservedRegs() accurate, this patch implements the todo, which is to make r2 allocatable on AIX for some leaf functions.
39 lines
1.3 KiB
YAML
39 lines
1.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple powerpc64-unknown-aix-xcoff -x mir \
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# RUN: -stop-after=prologepilog --verify-machineinstrs < %s | \
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# RUN: FileCheck %s --check-prefixes=CHECK
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---
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name: test_callee
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frameInfo:
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hasCalls: true
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: test_callee
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; CHECK: $x3 = LI8 10
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; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3
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$x3 = LI8 10
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BLR8 implicit $lr8, implicit $rm, implicit killed $x3
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...
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---
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name: test
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tracksRegLiveness: true
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stack:
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- { id: 0, size: 32704, alignment: 8 }
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body: |
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bb.0:
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; CHECK-LABEL: name: test
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; CHECK: $x0 = MFLR8 implicit $lr8
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; CHECK-NEXT: STD killed $x0, 16, $x1
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; CHECK-NEXT: $x1 = STDU $x1, -32752, $x1
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; CHECK-NEXT: BL8 @test_callee, csr_ppc64_r2, implicit-def dead $lr8, implicit $rm, implicit-def $r1, implicit-def $x3
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; CHECK-NEXT: $x1 = ADDI8 $x1, 32752
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; CHECK-NEXT: $x0 = LD 16, $x1
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; CHECK-NEXT: MTLR8 $x0, implicit-def $lr8
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; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3
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BL8 @test_callee, csr_ppc64_r2, implicit-def dead $lr8, implicit $rm, implicit-def $r1, implicit-def $x3
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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