8e901c255d
We can decide whether to expand isel or not in instruction selection pass and early-if-conversion pass. The transformation implemented in PPCExpandISel can be retired considering PPC backend doesn't generate `isel` instructions post-RA. Also if we are seeking performant branch-or-isel decision, we can turn to selectoptimize pass. --------- Co-authored-by: Kai Luo <lkail@cn.ibm.com>
73 lines
2.2 KiB
LLVM
73 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs -mcpu=pwr7 -mattr=-isel < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define signext i32 @crbitsoff(i32 signext %v1, i32 signext %v2) #0 {
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; CHECK-LABEL: crbitsoff:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cntlzw 4, 4
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; CHECK-NEXT: cmplwi 3, 0
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; CHECK-NEXT: li 3, 1
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; CHECK-NEXT: iseleq 3, 0, 3
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; CHECK-NEXT: rlwinm 4, 4, 27, 5, 31
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; CHECK-NEXT: and 3, 3, 4
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; CHECK-NEXT: blr
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;
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; CHECK-NO-ISEL-LABEL: crbitsoff:
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; CHECK-NO-ISEL: # %bb.0: # %entry
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; CHECK-NO-ISEL-NEXT: cmplwi 3, 0
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; CHECK-NO-ISEL-NEXT: li 3, 1
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; CHECK-NO-ISEL-NEXT: bne 0, .LBB0_2
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; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
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; CHECK-NO-ISEL-NEXT: li 3, 0
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; CHECK-NO-ISEL-NEXT: .LBB0_2: # %entry
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; CHECK-NO-ISEL-NEXT: cntlzw 4, 4
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; CHECK-NO-ISEL-NEXT: rlwinm 4, 4, 27, 5, 31
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; CHECK-NO-ISEL-NEXT: and 3, 3, 4
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; CHECK-NO-ISEL-NEXT: blr
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entry:
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%tobool = icmp ne i32 %v1, 0
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%lnot = icmp eq i32 %v2, 0
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%and3 = and i1 %tobool, %lnot
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%and = zext i1 %and3 to i32
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ret i32 %and
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}
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define signext i32 @crbitson(i32 signext %v1, i32 signext %v2) #1 {
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; CHECK-LABEL: crbitson:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cntlzw 3, 3
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; CHECK-NEXT: cntlzw 4, 4
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; CHECK-NEXT: srwi 3, 3, 5
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; CHECK-NEXT: srwi 4, 4, 5
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; CHECK-NEXT: xori 3, 3, 1
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; CHECK-NEXT: and 3, 3, 4
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; CHECK-NEXT: blr
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;
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; CHECK-NO-ISEL-LABEL: crbitson:
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; CHECK-NO-ISEL: # %bb.0: # %entry
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; CHECK-NO-ISEL-NEXT: cntlzw 3, 3
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; CHECK-NO-ISEL-NEXT: cntlzw 4, 4
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; CHECK-NO-ISEL-NEXT: srwi 3, 3, 5
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; CHECK-NO-ISEL-NEXT: srwi 4, 4, 5
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; CHECK-NO-ISEL-NEXT: xori 3, 3, 1
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; CHECK-NO-ISEL-NEXT: and 3, 3, 4
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; CHECK-NO-ISEL-NEXT: blr
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entry:
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%tobool = icmp ne i32 %v1, 0
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%lnot = icmp eq i32 %v2, 0
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%and3 = and i1 %tobool, %lnot
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%and = zext i1 %and3 to i32
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ret i32 %and
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}
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attributes #0 = { nounwind readnone "target-features"="-crbits" }
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attributes #1 = { nounwind readnone }
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