llvm-project/llvm/test/CodeGen/PowerPC/remove-redundant-load-imm.ll
Chen Zheng eb7d16ea25 [PowerPC] make expensive mflr be away from its user in the function prologue
mflr is kind of expensive on Power version smaller than 10, so we should
schedule the store for the mflr's def away from mflr.

In epilogue, the expensive mtlr has no user for its def, so it doesn't
matter that the load and the mtlr are back-to-back.

Reviewed By: RolandF

Differential Revision: https://reviews.llvm.org/D137423
2022-11-14 21:14:20 -05:00

52 lines
1.5 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mcpu=pwr9 -O3 < %s | FileCheck %s -check-prefix=PPC64LE
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
@global.6 = external global ptr
declare void @barney.88(i1, ptr)
declare void @barney.94(ptr, i32)
define void @redundancy_on_ppc_only(i1 %arg7) nounwind {
; PPC64LE-LABEL: redundancy_on_ppc_only:
; PPC64LE: # %bb.0: # %bb
; PPC64LE-NEXT: andi. 3, 3, 1
; PPC64LE-NEXT: mflr 0
; PPC64LE-NEXT: stdu 1, -32(1)
; PPC64LE-NEXT: li 3, 1
; PPC64LE-NEXT: li 4, 0
; PPC64LE-NEXT: std 0, 48(1)
; PPC64LE-NEXT: iselgt 3, 3, 4
; PPC64LE-NEXT: bl barney.88
; PPC64LE-NEXT: nop
; PPC64LE-NEXT: addi 1, 1, 32
; PPC64LE-NEXT: ld 0, 16(1)
; PPC64LE-NEXT: mtlr 0
; PPC64LE-NEXT: blr
bb:
br label %bb10
bb10: ; preds = %bb
call void @barney.88(i1 %arg7, ptr null)
ret void
}
define void @redundancy_on_ppc_and_other_targets() nounwind {
; PPC64LE-LABEL: redundancy_on_ppc_and_other_targets:
; PPC64LE: # %bb.0:
; PPC64LE-NEXT: mflr 0
; PPC64LE-NEXT: stdu 1, -32(1)
; PPC64LE-NEXT: addis 3, 2, .LC0@toc@ha
; PPC64LE-NEXT: li 4, 0
; PPC64LE-NEXT: std 0, 48(1)
; PPC64LE-NEXT: ld 3, .LC0@toc@l(3)
; PPC64LE-NEXT: std 4, 0(3)
; PPC64LE-NEXT: bl barney.94
; PPC64LE-NEXT: nop
store ptr null, ptr @global.6
call void @barney.94(ptr undef, i32 0)
unreachable
}