llvm-project/llvm/test/CodeGen/PowerPC/scalar_vector_test_3.ll
Kai Nacke 5403c59c60 [PPC] Opaque pointer migration, part 2.
The LIT test cases were migrated with the script provided by
Nikita Popov. Due to the size of the change it is split into
several parts.

Reviewed By: nemanja, nikic

Differential Revision: https://reviews.llvm.org/D135474
2022-10-11 17:24:06 +00:00

274 lines
7.6 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE
; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9BE
; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8LE
; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8BE
; Function Attrs: norecurse nounwind readonly
define <2 x i64> @s2v_test1(ptr nocapture readonly %int32, <2 x i64> %vec) {
; P9LE-LABEL: s2v_test1:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: lfiwax f0, 0, r3
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
;
; P9BE-LABEL: s2v_test1:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfiwax f0, 0, r3
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
;
; P8LE-LABEL: s2v_test1:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: lfiwax f0, 0, r3
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
;
; P8BE-LABEL: s2v_test1:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lfiwax f0, 0, r3
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
entry:
%0 = load i32, ptr %int32, align 4
%conv = sext i32 %0 to i64
%vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0
ret <2 x i64> %vecins
}
; Function Attrs: norecurse nounwind readonly
define <2 x i64> @s2v_test2(ptr nocapture readonly %int32, <2 x i64> %vec) {
; P9LE-LABEL: s2v_test2:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addi r3, r3, 4
; P9LE-NEXT: lfiwax f0, 0, r3
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
;
; P9BE-LABEL: s2v_test2:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addi r3, r3, 4
; P9BE-NEXT: lfiwax f0, 0, r3
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
;
; P8LE-LABEL: s2v_test2:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: addi r3, r3, 4
; P8LE-NEXT: lfiwax f0, 0, r3
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
;
; P8BE-LABEL: s2v_test2:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: addi r3, r3, 4
; P8BE-NEXT: lfiwax f0, 0, r3
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
entry:
%arrayidx = getelementptr inbounds i32, ptr %int32, i64 1
%0 = load i32, ptr %arrayidx, align 4
%conv = sext i32 %0 to i64
%vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0
ret <2 x i64> %vecins
}
; Function Attrs: norecurse nounwind readonly
define <2 x i64> @s2v_test3(ptr nocapture readonly %int32, <2 x i64> %vec, i32 signext %Idx) {
; P9LE-LABEL: s2v_test3:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: sldi r4, r7, 2
; P9LE-NEXT: lfiwax f0, r3, r4
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
;
; P9BE-LABEL: s2v_test3:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: sldi r4, r7, 2
; P9BE-NEXT: lfiwax f0, r3, r4
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
;
; P8LE-LABEL: s2v_test3:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: sldi r4, r7, 2
; P8LE-NEXT: lfiwax f0, r3, r4
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
;
; P8BE-LABEL: s2v_test3:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: sldi r4, r7, 2
; P8BE-NEXT: lfiwax f0, r3, r4
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
entry:
%idxprom = sext i32 %Idx to i64
%arrayidx = getelementptr inbounds i32, ptr %int32, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4
%conv = sext i32 %0 to i64
%vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0
ret <2 x i64> %vecins
}
; Function Attrs: norecurse nounwind readonly
define <2 x i64> @s2v_test4(ptr nocapture readonly %int32, <2 x i64> %vec) {
; P9LE-LABEL: s2v_test4:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addi r3, r3, 4
; P9LE-NEXT: lfiwax f0, 0, r3
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
;
; P9BE-LABEL: s2v_test4:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addi r3, r3, 4
; P9BE-NEXT: lfiwax f0, 0, r3
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
;
; P8LE-LABEL: s2v_test4:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: addi r3, r3, 4
; P8LE-NEXT: lfiwax f0, 0, r3
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
;
; P8BE-LABEL: s2v_test4:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: addi r3, r3, 4
; P8BE-NEXT: lfiwax f0, 0, r3
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
entry:
%arrayidx = getelementptr inbounds i32, ptr %int32, i64 1
%0 = load i32, ptr %arrayidx, align 4
%conv = sext i32 %0 to i64
%vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0
ret <2 x i64> %vecins
}
; Function Attrs: norecurse nounwind readonly
define <2 x i64> @s2v_test5(<2 x i64> %vec, ptr nocapture readonly %ptr1) {
; P9LE-LABEL: s2v_test5:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: lfiwax f0, 0, r5
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
;
; P9BE-LABEL: s2v_test5:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfiwax f0, 0, r5
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
;
; P8LE-LABEL: s2v_test5:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: lfiwax f0, 0, r5
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
;
; P8BE-LABEL: s2v_test5:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lfiwax f0, 0, r5
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
entry:
%0 = load i32, ptr %ptr1, align 4
%conv = sext i32 %0 to i64
%vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0
ret <2 x i64> %vecins
}
; Function Attrs: norecurse nounwind readonly
define <2 x i64> @s2v_test6(ptr nocapture readonly %ptr) {
; P9LE-LABEL: s2v_test6:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: lfiwax f0, 0, r3
; P9LE-NEXT: xxspltd v2, f0, 0
; P9LE-NEXT: blr
;
; P9BE-LABEL: s2v_test6:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfiwax f0, 0, r3
; P9BE-NEXT: xxspltd v2, f0, 0
; P9BE-NEXT: blr
;
; P8LE-LABEL: s2v_test6:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: lfiwax f0, 0, r3
; P8LE-NEXT: xxspltd v2, f0, 0
; P8LE-NEXT: blr
;
; P8BE-LABEL: s2v_test6:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lfiwax f0, 0, r3
; P8BE-NEXT: xxspltd v2, f0, 0
; P8BE-NEXT: blr
entry:
%0 = load i32, ptr %ptr, align 4
%conv = sext i32 %0 to i64
%splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0
%splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer
ret <2 x i64> %splat.splat
}
; Function Attrs: norecurse nounwind readonly
define <2 x i64> @s2v_test7(ptr nocapture readonly %ptr) {
; P9LE-LABEL: s2v_test7:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: lfiwax f0, 0, r3
; P9LE-NEXT: xxspltd v2, f0, 0
; P9LE-NEXT: blr
;
; P9BE-LABEL: s2v_test7:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfiwax f0, 0, r3
; P9BE-NEXT: xxspltd v2, f0, 0
; P9BE-NEXT: blr
;
; P8LE-LABEL: s2v_test7:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: lfiwax f0, 0, r3
; P8LE-NEXT: xxspltd v2, f0, 0
; P8LE-NEXT: blr
;
; P8BE-LABEL: s2v_test7:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lfiwax f0, 0, r3
; P8BE-NEXT: xxspltd v2, f0, 0
; P8BE-NEXT: blr
entry:
%0 = load i32, ptr %ptr, align 4
%conv = sext i32 %0 to i64
%splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0
%splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer
ret <2 x i64> %splat.splat
}