eb7d16ea25
mflr is kind of expensive on Power version smaller than 10, so we should schedule the store for the mflr's def away from mflr. In epilogue, the expensive mtlr has no user for its def, so it doesn't matter that the load and the mtlr are back-to-back. Reviewed By: RolandF Differential Revision: https://reviews.llvm.org/D137423
104 lines
3.6 KiB
LLVM
104 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s
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; The tests check the behavior of the tail call decision when the callee is speculatable.
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; Callee should be tail called in this function since it is at a tail call position.
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define dso_local double @speculatable_callee_return_use_only (ptr nocapture %res, double %a) #0 {
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; CHECK-LABEL: speculatable_callee_return_use_only:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: b callee
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; CHECK-NEXT: #TC_RETURNd8 callee 0
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entry:
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%value = tail call double @callee(double %a) #2
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ret double %value
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}
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; Callee should not be tail called since it is not at a tail call position.
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define dso_local void @speculatable_callee_non_return_use_only (ptr nocapture %res, double %a) #0 {
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; CHECK-LABEL: speculatable_callee_non_return_use_only:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr r0
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; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
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; CHECK-NEXT: stdu r1, -48(r1)
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; CHECK-NEXT: std r0, 64(r1)
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; CHECK-NEXT: mr r30, r3
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; CHECK-NEXT: bl callee
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; CHECK-NEXT: stfd f1, 0(r30)
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; CHECK-NEXT: addi r1, r1, 48
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; CHECK-NEXT: ld r0, 16(r1)
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; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
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; CHECK-NEXT: mtlr r0
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; CHECK-NEXT: blr
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entry:
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%call = tail call double @callee(double %a) #2
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store double %call, ptr %res, align 8
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ret void
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}
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; Callee should not be tail called since it is not at a tail call position.
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define dso_local double @speculatable_callee_multi_use (ptr nocapture %res, double %a) #0 {
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; CHECK-LABEL: speculatable_callee_multi_use:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr r0
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; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
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; CHECK-NEXT: stdu r1, -48(r1)
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; CHECK-NEXT: std r0, 64(r1)
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; CHECK-NEXT: mr r30, r3
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; CHECK-NEXT: bl callee
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; CHECK-NEXT: stfd f1, 0(r30)
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; CHECK-NEXT: addi r1, r1, 48
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; CHECK-NEXT: ld r0, 16(r1)
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; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
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; CHECK-NEXT: mtlr r0
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; CHECK-NEXT: blr
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entry:
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%call = tail call double @callee(double %a) #2
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store double %call, ptr %res, align 8
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ret double %call
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}
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; Callee should not be tail called since it is not at a tail call position.
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; FIXME: A speculatable callee can be tail called if it is moved into a valid tail call position.
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define dso_local double @speculatable_callee_intermediate_instructions (ptr nocapture %res, double %a) #0 {
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; CHECK-LABEL: speculatable_callee_intermediate_instructions:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr r0
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; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
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; CHECK-NEXT: stdu r1, -48(r1)
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; CHECK-NEXT: std r0, 64(r1)
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; CHECK-NEXT: mr r30, r3
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; CHECK-NEXT: bl callee
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; CHECK-NEXT: lis r3, 4101
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; CHECK-NEXT: ori r3, r3, 13107
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; CHECK-NEXT: rldic r3, r3, 34, 1
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; CHECK-NEXT: oris r3, r3, 52428
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; CHECK-NEXT: ori r3, r3, 52429
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; CHECK-NEXT: std r3, 0(r30)
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; CHECK-NEXT: addi r1, r1, 48
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; CHECK-NEXT: ld r0, 16(r1)
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; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
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; CHECK-NEXT: mtlr r0
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; CHECK-NEXT: blr
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entry:
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%call = tail call double @callee(double %a) #2
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store double 5.2, ptr %res, align 8
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ret double %call
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}
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define dso_local double @callee(double) #1 {
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; CHECK-LABEL: callee:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addis r3, r2, .LCPI4_0@toc@ha
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; CHECK-NEXT: lfs f1, .LCPI4_0@toc@l(r3)
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; CHECK-NEXT: blr
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ret double 4.5
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}
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attributes #0 = { nounwind }
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attributes #1 = { readnone speculatable }
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attributes #2 = { nounwind noinline }
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