
There are many information that can be used for tuning, like alignments, cache line size, etc. But we can't make all of them `SubtargetFeature` because some of them are not with enumerable value, for example, `PrefetchDistance` used by `LoopDataPrefetch`. In this patch, a searchable table `RISCVTuneInfoTable` is added, in which each entry contains the CPU name and all tune information defined in `RISCVTuneInfo`. Each field of `RISCVTuneInfo` should have a default value and processor definitions can override the default value via `let` statements. We don't need to define a `RISCVTuneInfo` for each processor and it will use the default value (which is for `generic`) if no `RISCVTuneInfo` defined. For processors in the same series, a subclass can inherit from `RISCVTuneInfo` and override the fields. And we can also override the fields in processor definitions if there are some differences in the same processor series. When initilizing `RISCVSubtarget`, we will use `TuneCPU` as the key to serach the tune info table. So, the behavior here is if we don't specify the tune CPU, we will use specified `CPU`, which is expected I think. This patch almost undoes 61ab106, in which I added tune features of preferred function/loop alignments. More tune information can be added in the future.
45 lines
1.2 KiB
LLVM
45 lines
1.2 KiB
LLVM
; RUN: llc < %s -mtriple=riscv64 | FileCheck %s
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; RUN: llc < %s -mtriple=riscv64 -align-loops=16 | FileCheck %s -check-prefix=ALIGN_16
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; RUN: llc < %s -mtriple=riscv64 -align-loops=32 | FileCheck %s -check-prefix=ALIGN_32
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declare void @foo()
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define void @test(i32 %n, i32 %m) nounwind {
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; CHECK-LABEL: test:
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; CHECK-NOT: .p2align
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; CHECK: ret
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; ALIGN_16-LABEL: test:
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; ALIGN_16: .p2align 4{{$}}
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; ALIGN_16-NEXT: .LBB0_1: # %outer
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; ALIGN_16: .p2align 4{{$}}
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; ALIGN_16-NEXT: .LBB0_2: # %inner
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; ALIGN_32-LABEL: test:
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; ALIGN_32: .p2align 5{{$}}
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; ALIGN_32-NEXT: .LBB0_1: # %outer
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; ALIGN_32: .p2align 5{{$}}
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; ALIGN_32-NEXT: .LBB0_2: # %inner
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entry:
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br label %outer
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outer:
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%outer.iv = phi i32 [0, %entry], [%outer.iv.next, %outer_bb]
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br label %inner
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inner:
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%inner.iv = phi i32 [0, %outer], [%inner.iv.next, %inner]
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call void @foo()
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%inner.iv.next = add i32 %inner.iv, 1
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%inner.cond = icmp ne i32 %inner.iv.next, %m
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br i1 %inner.cond, label %inner, label %outer_bb
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outer_bb:
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%outer.iv.next = add i32 %outer.iv, 1
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%outer.cond = icmp ne i32 %outer.iv.next, %n
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br i1 %outer.cond, label %outer, label %exit
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exit:
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ret void
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}
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