6d91d7ce6a
This change splits the llvm/test/CodeGen/RISCV/branch-relaxation.ll test which contained comments saying that different test functions were valid or not on rv32/rv64. Not only was this confusing, but the inline assembly in the test was being passed values wider than xlen on rv32.
1056 lines
35 KiB
LLVM
1056 lines
35 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs -filetype=obj < %s \
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; RUN: -o /dev/null 2>&1
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; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs \
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; RUN: -filetype=obj < %s -o /dev/null 2>&1
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s
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; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs < %s \
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; RUN: | FileCheck %s
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define void @relax_bcc(i1 %a) nounwind {
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; CHECK-LABEL: relax_bcc:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andi a0, a0, 1
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; CHECK-NEXT: bnez a0, .LBB0_1
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; CHECK-NEXT: j .LBB0_2
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; CHECK-NEXT: .LBB0_1: # %iftrue
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; CHECK-NEXT: #APP
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; CHECK-NEXT: .zero 4096
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: .LBB0_2: # %tail
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; CHECK-NEXT: ret
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br i1 %a, label %iftrue, label %tail
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iftrue:
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call void asm sideeffect ".space 4096", ""()
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br label %tail
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tail:
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ret void
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}
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define i32 @relax_jal(i1 %a) nounwind {
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; CHECK-LABEL: relax_jal:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: andi a0, a0, 1
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; CHECK-NEXT: bnez a0, .LBB1_1
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; CHECK-NEXT: # %bb.4:
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; CHECK-NEXT: jump .LBB1_2, a0
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; CHECK-NEXT: .LBB1_1: # %iftrue
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: .zero 1048576
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: j .LBB1_3
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; CHECK-NEXT: .LBB1_2: # %jmp
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: .LBB1_3: # %tail
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; CHECK-NEXT: li a0, 1
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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br i1 %a, label %iftrue, label %jmp
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jmp:
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call void asm sideeffect "", ""()
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br label %tail
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iftrue:
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call void asm sideeffect "", ""()
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br label %space
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space:
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call void asm sideeffect ".space 1048576", ""()
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br label %tail
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tail:
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ret i32 1
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}
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define void @relax_jal_spill_32() {
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; CHECK-LABEL: relax_jal_spill_32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -64
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; CHECK-NEXT: .cfi_def_cfa_offset 64
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; CHECK-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s1, 52(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s2, 48(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s3, 44(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s4, 40(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s5, 36(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s6, 32(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s7, 28(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s8, 24(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s9, 20(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s10, 16(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s11, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset ra, -4
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; CHECK-NEXT: .cfi_offset s0, -8
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; CHECK-NEXT: .cfi_offset s1, -12
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; CHECK-NEXT: .cfi_offset s2, -16
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; CHECK-NEXT: .cfi_offset s3, -20
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; CHECK-NEXT: .cfi_offset s4, -24
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; CHECK-NEXT: .cfi_offset s5, -28
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; CHECK-NEXT: .cfi_offset s6, -32
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; CHECK-NEXT: .cfi_offset s7, -36
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; CHECK-NEXT: .cfi_offset s8, -40
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; CHECK-NEXT: .cfi_offset s9, -44
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; CHECK-NEXT: .cfi_offset s10, -48
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; CHECK-NEXT: .cfi_offset s11, -52
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li ra, 1
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li t0, 5
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li t1, 6
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li t2, 7
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s0, 8
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s1, 9
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li a0, 10
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li a1, 11
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li a2, 12
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li a3, 13
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li a4, 14
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li a5, 15
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li a6, 16
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li a7, 17
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s2, 18
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s3, 19
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s4, 20
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s5, 21
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s6, 22
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s7, 23
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s8, 24
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s9, 25
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s10, 26
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li s11, 27
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li t3, 28
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li t4, 29
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li t5, 30
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: li t6, 31
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: beq t5, t6, .LBB2_1
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; CHECK-NEXT: # %bb.3:
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; CHECK-NEXT: sw s11, 0(sp)
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; CHECK-NEXT: jump .LBB2_4, s11
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; CHECK-NEXT: .LBB2_1: # %branch_1
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; CHECK-NEXT: #APP
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; CHECK-NEXT: .zero 1048576
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: j .LBB2_2
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; CHECK-NEXT: .LBB2_4: # %branch_2
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; CHECK-NEXT: lw s11, 0(sp)
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; CHECK-NEXT: .LBB2_2: # %branch_2
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use ra
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use t0
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use t1
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use t2
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s0
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s1
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use a0
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use a1
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use a2
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use a3
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use a4
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use a5
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use a6
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use a7
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s2
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s3
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s4
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s5
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s6
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s7
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s8
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s9
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s10
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use s11
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use t3
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use t4
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use t5
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: #APP
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; CHECK-NEXT: # reg use t6
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s1, 52(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s2, 48(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s3, 44(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s4, 40(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s5, 36(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s6, 32(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s7, 28(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s8, 24(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s9, 20(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s10, 16(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s11, 12(sp) # 4-byte Folded Reload
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; CHECK-NEXT: .cfi_restore ra
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; CHECK-NEXT: .cfi_restore s0
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; CHECK-NEXT: .cfi_restore s1
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; CHECK-NEXT: .cfi_restore s2
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; CHECK-NEXT: .cfi_restore s3
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; CHECK-NEXT: .cfi_restore s4
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; CHECK-NEXT: .cfi_restore s5
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; CHECK-NEXT: .cfi_restore s6
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; CHECK-NEXT: .cfi_restore s7
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; CHECK-NEXT: .cfi_restore s8
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; CHECK-NEXT: .cfi_restore s9
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; CHECK-NEXT: .cfi_restore s10
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; CHECK-NEXT: .cfi_restore s11
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; CHECK-NEXT: addi sp, sp, 64
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; CHECK-NEXT: .cfi_def_cfa_offset 0
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; CHECK-NEXT: ret
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%ra = call i32 asm sideeffect "addi ra, x0, 1", "={ra}"()
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%t0 = call i32 asm sideeffect "addi t0, x0, 5", "={t0}"()
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%t1 = call i32 asm sideeffect "addi t1, x0, 6", "={t1}"()
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%t2 = call i32 asm sideeffect "addi t2, x0, 7", "={t2}"()
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%s0 = call i32 asm sideeffect "addi s0, x0, 8", "={s0}"()
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%s1 = call i32 asm sideeffect "addi s1, x0, 9", "={s1}"()
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%a0 = call i32 asm sideeffect "addi a0, x0, 10", "={a0}"()
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%a1 = call i32 asm sideeffect "addi a1, x0, 11", "={a1}"()
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%a2 = call i32 asm sideeffect "addi a2, x0, 12", "={a2}"()
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%a3 = call i32 asm sideeffect "addi a3, x0, 13", "={a3}"()
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%a4 = call i32 asm sideeffect "addi a4, x0, 14", "={a4}"()
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%a5 = call i32 asm sideeffect "addi a5, x0, 15", "={a5}"()
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%a6 = call i32 asm sideeffect "addi a6, x0, 16", "={a6}"()
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%a7 = call i32 asm sideeffect "addi a7, x0, 17", "={a7}"()
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%s2 = call i32 asm sideeffect "addi s2, x0, 18", "={s2}"()
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%s3 = call i32 asm sideeffect "addi s3, x0, 19", "={s3}"()
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%s4 = call i32 asm sideeffect "addi s4, x0, 20", "={s4}"()
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%s5 = call i32 asm sideeffect "addi s5, x0, 21", "={s5}"()
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%s6 = call i32 asm sideeffect "addi s6, x0, 22", "={s6}"()
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%s7 = call i32 asm sideeffect "addi s7, x0, 23", "={s7}"()
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%s8 = call i32 asm sideeffect "addi s8, x0, 24", "={s8}"()
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%s9 = call i32 asm sideeffect "addi s9, x0, 25", "={s9}"()
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%s10 = call i32 asm sideeffect "addi s10, x0, 26", "={s10}"()
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%s11 = call i32 asm sideeffect "addi s11, x0, 27", "={s11}"()
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%t3 = call i32 asm sideeffect "addi t3, x0, 28", "={t3}"()
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%t4 = call i32 asm sideeffect "addi t4, x0, 29", "={t4}"()
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%t5 = call i32 asm sideeffect "addi t5, x0, 30", "={t5}"()
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%t6 = call i32 asm sideeffect "addi t6, x0, 31", "={t6}"()
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%cmp = icmp eq i32 %t5, %t6
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br i1 %cmp, label %branch_1, label %branch_2
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branch_1:
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call void asm sideeffect ".space 1048576", ""()
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br label %branch_2
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branch_2:
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call void asm sideeffect "# reg use $0", "{ra}"(i32 %ra)
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call void asm sideeffect "# reg use $0", "{t0}"(i32 %t0)
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call void asm sideeffect "# reg use $0", "{t1}"(i32 %t1)
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call void asm sideeffect "# reg use $0", "{t2}"(i32 %t2)
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call void asm sideeffect "# reg use $0", "{s0}"(i32 %s0)
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call void asm sideeffect "# reg use $0", "{s1}"(i32 %s1)
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call void asm sideeffect "# reg use $0", "{a0}"(i32 %a0)
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call void asm sideeffect "# reg use $0", "{a1}"(i32 %a1)
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call void asm sideeffect "# reg use $0", "{a2}"(i32 %a2)
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call void asm sideeffect "# reg use $0", "{a3}"(i32 %a3)
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call void asm sideeffect "# reg use $0", "{a4}"(i32 %a4)
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call void asm sideeffect "# reg use $0", "{a5}"(i32 %a5)
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call void asm sideeffect "# reg use $0", "{a6}"(i32 %a6)
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call void asm sideeffect "# reg use $0", "{a7}"(i32 %a7)
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call void asm sideeffect "# reg use $0", "{s2}"(i32 %s2)
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call void asm sideeffect "# reg use $0", "{s3}"(i32 %s3)
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call void asm sideeffect "# reg use $0", "{s4}"(i32 %s4)
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call void asm sideeffect "# reg use $0", "{s5}"(i32 %s5)
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call void asm sideeffect "# reg use $0", "{s6}"(i32 %s6)
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call void asm sideeffect "# reg use $0", "{s7}"(i32 %s7)
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call void asm sideeffect "# reg use $0", "{s8}"(i32 %s8)
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call void asm sideeffect "# reg use $0", "{s9}"(i32 %s9)
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call void asm sideeffect "# reg use $0", "{s10}"(i32 %s10)
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call void asm sideeffect "# reg use $0", "{s11}"(i32 %s11)
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call void asm sideeffect "# reg use $0", "{t3}"(i32 %t3)
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call void asm sideeffect "# reg use $0", "{t4}"(i32 %t4)
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call void asm sideeffect "# reg use $0", "{t5}"(i32 %t5)
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call void asm sideeffect "# reg use $0", "{t6}"(i32 %t6)
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ret void
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}
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define void @relax_jal_spill_32_adjust_spill_slot() {
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; If the stack is large and the offset of BranchRelaxationScratchFrameIndex
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; is out the range of 12-bit signed integer, check whether the spill slot is
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; adjusted to close to the stack base register.
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; CHECK-LABEL: relax_jal_spill_32_adjust_spill_slot:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -2032
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; CHECK-NEXT: .cfi_def_cfa_offset 2032
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; CHECK-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s1, 2020(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s2, 2016(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s3, 2012(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s4, 2008(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s5, 2004(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s6, 2000(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s7, 1996(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s8, 1992(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s9, 1988(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s10, 1984(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s11, 1980(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_offset ra, -4
|
|
; CHECK-NEXT: .cfi_offset s0, -8
|
|
; CHECK-NEXT: .cfi_offset s1, -12
|
|
; CHECK-NEXT: .cfi_offset s2, -16
|
|
; CHECK-NEXT: .cfi_offset s3, -20
|
|
; CHECK-NEXT: .cfi_offset s4, -24
|
|
; CHECK-NEXT: .cfi_offset s5, -28
|
|
; CHECK-NEXT: .cfi_offset s6, -32
|
|
; CHECK-NEXT: .cfi_offset s7, -36
|
|
; CHECK-NEXT: .cfi_offset s8, -40
|
|
; CHECK-NEXT: .cfi_offset s9, -44
|
|
; CHECK-NEXT: .cfi_offset s10, -48
|
|
; CHECK-NEXT: .cfi_offset s11, -52
|
|
; CHECK-NEXT: addi s0, sp, 2032
|
|
; CHECK-NEXT: .cfi_def_cfa s0, 0
|
|
; CHECK-NEXT: lui a0, 2
|
|
; CHECK-NEXT: addi a0, a0, -2032
|
|
; CHECK-NEXT: sub sp, sp, a0
|
|
; CHECK-NEXT: srli a0, sp, 12
|
|
; CHECK-NEXT: slli sp, a0, 12
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li ra, 1
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t0, 5
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t1, 6
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t2, 7
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s0, 8
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s1, 9
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a0, 10
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a1, 11
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a2, 12
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a3, 13
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a4, 14
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a5, 15
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a6, 16
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a7, 17
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s2, 18
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s3, 19
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s4, 20
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s5, 21
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s6, 22
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s7, 23
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s8, 24
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s9, 25
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s10, 26
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s11, 27
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t3, 28
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t4, 29
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t5, 30
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t6, 31
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: beq t5, t6, .LBB3_1
|
|
; CHECK-NEXT: # %bb.3:
|
|
; CHECK-NEXT: sw s11, 0(sp)
|
|
; CHECK-NEXT: jump .LBB3_4, s11
|
|
; CHECK-NEXT: .LBB3_1: # %branch_1
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: .zero 1048576
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: j .LBB3_2
|
|
; CHECK-NEXT: .LBB3_4: # %branch_2
|
|
; CHECK-NEXT: lw s11, 0(sp)
|
|
; CHECK-NEXT: .LBB3_2: # %branch_2
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use ra
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t0
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t1
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t2
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s0
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s1
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a0
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a1
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a2
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a3
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a4
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a5
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a6
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a7
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s2
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s3
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s4
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s5
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s6
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s7
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s8
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s9
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s10
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s11
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t3
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t4
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t5
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t6
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: addi sp, s0, -2032
|
|
; CHECK-NEXT: .cfi_def_cfa sp, 2032
|
|
; CHECK-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s1, 2020(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s2, 2016(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s3, 2012(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s4, 2008(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s5, 2004(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s6, 2000(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s7, 1996(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s8, 1992(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s9, 1988(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s10, 1984(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s11, 1980(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: .cfi_restore ra
|
|
; CHECK-NEXT: .cfi_restore s0
|
|
; CHECK-NEXT: .cfi_restore s1
|
|
; CHECK-NEXT: .cfi_restore s2
|
|
; CHECK-NEXT: .cfi_restore s3
|
|
; CHECK-NEXT: .cfi_restore s4
|
|
; CHECK-NEXT: .cfi_restore s5
|
|
; CHECK-NEXT: .cfi_restore s6
|
|
; CHECK-NEXT: .cfi_restore s7
|
|
; CHECK-NEXT: .cfi_restore s8
|
|
; CHECK-NEXT: .cfi_restore s9
|
|
; CHECK-NEXT: .cfi_restore s10
|
|
; CHECK-NEXT: .cfi_restore s11
|
|
; CHECK-NEXT: addi sp, sp, 2032
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 0
|
|
; CHECK-NEXT: ret
|
|
%stack_obj = alloca i32, align 4096
|
|
|
|
%ra = call i32 asm sideeffect "addi ra, x0, 1", "={ra}"()
|
|
%t0 = call i32 asm sideeffect "addi t0, x0, 5", "={t0}"()
|
|
%t1 = call i32 asm sideeffect "addi t1, x0, 6", "={t1}"()
|
|
%t2 = call i32 asm sideeffect "addi t2, x0, 7", "={t2}"()
|
|
%s0 = call i32 asm sideeffect "addi s0, x0, 8", "={s0}"()
|
|
%s1 = call i32 asm sideeffect "addi s1, x0, 9", "={s1}"()
|
|
%a0 = call i32 asm sideeffect "addi a0, x0, 10", "={a0}"()
|
|
%a1 = call i32 asm sideeffect "addi a1, x0, 11", "={a1}"()
|
|
%a2 = call i32 asm sideeffect "addi a2, x0, 12", "={a2}"()
|
|
%a3 = call i32 asm sideeffect "addi a3, x0, 13", "={a3}"()
|
|
%a4 = call i32 asm sideeffect "addi a4, x0, 14", "={a4}"()
|
|
%a5 = call i32 asm sideeffect "addi a5, x0, 15", "={a5}"()
|
|
%a6 = call i32 asm sideeffect "addi a6, x0, 16", "={a6}"()
|
|
%a7 = call i32 asm sideeffect "addi a7, x0, 17", "={a7}"()
|
|
%s2 = call i32 asm sideeffect "addi s2, x0, 18", "={s2}"()
|
|
%s3 = call i32 asm sideeffect "addi s3, x0, 19", "={s3}"()
|
|
%s4 = call i32 asm sideeffect "addi s4, x0, 20", "={s4}"()
|
|
%s5 = call i32 asm sideeffect "addi s5, x0, 21", "={s5}"()
|
|
%s6 = call i32 asm sideeffect "addi s6, x0, 22", "={s6}"()
|
|
%s7 = call i32 asm sideeffect "addi s7, x0, 23", "={s7}"()
|
|
%s8 = call i32 asm sideeffect "addi s8, x0, 24", "={s8}"()
|
|
%s9 = call i32 asm sideeffect "addi s9, x0, 25", "={s9}"()
|
|
%s10 = call i32 asm sideeffect "addi s10, x0, 26", "={s10}"()
|
|
%s11 = call i32 asm sideeffect "addi s11, x0, 27", "={s11}"()
|
|
%t3 = call i32 asm sideeffect "addi t3, x0, 28", "={t3}"()
|
|
%t4 = call i32 asm sideeffect "addi t4, x0, 29", "={t4}"()
|
|
%t5 = call i32 asm sideeffect "addi t5, x0, 30", "={t5}"()
|
|
%t6 = call i32 asm sideeffect "addi t6, x0, 31", "={t6}"()
|
|
|
|
%cmp = icmp eq i32 %t5, %t6
|
|
br i1 %cmp, label %branch_1, label %branch_2
|
|
|
|
branch_1:
|
|
call void asm sideeffect ".space 1048576", ""()
|
|
br label %branch_2
|
|
|
|
branch_2:
|
|
call void asm sideeffect "# reg use $0", "{ra}"(i32 %ra)
|
|
call void asm sideeffect "# reg use $0", "{t0}"(i32 %t0)
|
|
call void asm sideeffect "# reg use $0", "{t1}"(i32 %t1)
|
|
call void asm sideeffect "# reg use $0", "{t2}"(i32 %t2)
|
|
call void asm sideeffect "# reg use $0", "{s0}"(i32 %s0)
|
|
call void asm sideeffect "# reg use $0", "{s1}"(i32 %s1)
|
|
call void asm sideeffect "# reg use $0", "{a0}"(i32 %a0)
|
|
call void asm sideeffect "# reg use $0", "{a1}"(i32 %a1)
|
|
call void asm sideeffect "# reg use $0", "{a2}"(i32 %a2)
|
|
call void asm sideeffect "# reg use $0", "{a3}"(i32 %a3)
|
|
call void asm sideeffect "# reg use $0", "{a4}"(i32 %a4)
|
|
call void asm sideeffect "# reg use $0", "{a5}"(i32 %a5)
|
|
call void asm sideeffect "# reg use $0", "{a6}"(i32 %a6)
|
|
call void asm sideeffect "# reg use $0", "{a7}"(i32 %a7)
|
|
call void asm sideeffect "# reg use $0", "{s2}"(i32 %s2)
|
|
call void asm sideeffect "# reg use $0", "{s3}"(i32 %s3)
|
|
call void asm sideeffect "# reg use $0", "{s4}"(i32 %s4)
|
|
call void asm sideeffect "# reg use $0", "{s5}"(i32 %s5)
|
|
call void asm sideeffect "# reg use $0", "{s6}"(i32 %s6)
|
|
call void asm sideeffect "# reg use $0", "{s7}"(i32 %s7)
|
|
call void asm sideeffect "# reg use $0", "{s8}"(i32 %s8)
|
|
call void asm sideeffect "# reg use $0", "{s9}"(i32 %s9)
|
|
call void asm sideeffect "# reg use $0", "{s10}"(i32 %s10)
|
|
call void asm sideeffect "# reg use $0", "{s11}"(i32 %s11)
|
|
call void asm sideeffect "# reg use $0", "{t3}"(i32 %t3)
|
|
call void asm sideeffect "# reg use $0", "{t4}"(i32 %t4)
|
|
call void asm sideeffect "# reg use $0", "{t5}"(i32 %t5)
|
|
call void asm sideeffect "# reg use $0", "{t6}"(i32 %t6)
|
|
|
|
ret void
|
|
}
|
|
|
|
define void @relax_jal_spill_32_restore_block_correspondence() {
|
|
; CHECK-LABEL: relax_jal_spill_32_restore_block_correspondence:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: addi sp, sp, -64
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 64
|
|
; CHECK-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s1, 52(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s2, 48(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s3, 44(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s4, 40(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s5, 36(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s6, 32(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s7, 28(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s8, 24(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s9, 20(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s10, 16(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: sw s11, 12(sp) # 4-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_offset ra, -4
|
|
; CHECK-NEXT: .cfi_offset s0, -8
|
|
; CHECK-NEXT: .cfi_offset s1, -12
|
|
; CHECK-NEXT: .cfi_offset s2, -16
|
|
; CHECK-NEXT: .cfi_offset s3, -20
|
|
; CHECK-NEXT: .cfi_offset s4, -24
|
|
; CHECK-NEXT: .cfi_offset s5, -28
|
|
; CHECK-NEXT: .cfi_offset s6, -32
|
|
; CHECK-NEXT: .cfi_offset s7, -36
|
|
; CHECK-NEXT: .cfi_offset s8, -40
|
|
; CHECK-NEXT: .cfi_offset s9, -44
|
|
; CHECK-NEXT: .cfi_offset s10, -48
|
|
; CHECK-NEXT: .cfi_offset s11, -52
|
|
; CHECK-NEXT: .cfi_remember_state
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li ra, 1
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t0, 5
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t1, 6
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t2, 7
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s0, 8
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s1, 9
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a0, 10
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a1, 11
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a2, 12
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a3, 13
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a4, 14
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a5, 15
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a6, 16
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li a7, 17
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s2, 18
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s3, 19
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s4, 20
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s5, 21
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s6, 22
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s7, 23
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s8, 24
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s9, 25
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s10, 26
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li s11, 27
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t3, 28
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t4, 29
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t5, 30
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: li t6, 31
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: bne t5, t6, .LBB4_2
|
|
; CHECK-NEXT: j .LBB4_1
|
|
; CHECK-NEXT: .LBB4_8: # %dest_1
|
|
; CHECK-NEXT: lw s11, 0(sp)
|
|
; CHECK-NEXT: .LBB4_1: # %dest_1
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # dest 1
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: j .LBB4_3
|
|
; CHECK-NEXT: .LBB4_2: # %cond_2
|
|
; CHECK-NEXT: bne t3, t4, .LBB4_5
|
|
; CHECK-NEXT: .LBB4_3: # %dest_2
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # dest 2
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: .LBB4_4: # %dest_3
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # dest 3
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use ra
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t0
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t1
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t2
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s0
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s1
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a0
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a1
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a2
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a3
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a4
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a5
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a6
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use a7
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s2
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s3
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s4
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s5
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s6
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s7
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s8
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s9
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s10
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use s11
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t3
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t4
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t5
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: # reg use t6
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s1, 52(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s2, 48(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s3, 44(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s4, 40(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s5, 36(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s6, 32(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s7, 28(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s8, 24(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s9, 20(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s10, 16(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: lw s11, 12(sp) # 4-byte Folded Reload
|
|
; CHECK-NEXT: .cfi_restore ra
|
|
; CHECK-NEXT: .cfi_restore s0
|
|
; CHECK-NEXT: .cfi_restore s1
|
|
; CHECK-NEXT: .cfi_restore s2
|
|
; CHECK-NEXT: .cfi_restore s3
|
|
; CHECK-NEXT: .cfi_restore s4
|
|
; CHECK-NEXT: .cfi_restore s5
|
|
; CHECK-NEXT: .cfi_restore s6
|
|
; CHECK-NEXT: .cfi_restore s7
|
|
; CHECK-NEXT: .cfi_restore s8
|
|
; CHECK-NEXT: .cfi_restore s9
|
|
; CHECK-NEXT: .cfi_restore s10
|
|
; CHECK-NEXT: .cfi_restore s11
|
|
; CHECK-NEXT: addi sp, sp, 64
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 0
|
|
; CHECK-NEXT: ret
|
|
; CHECK-NEXT: .LBB4_5: # %cond_3
|
|
; CHECK-NEXT: .cfi_restore_state
|
|
; CHECK-NEXT: beq t1, t2, .LBB4_4
|
|
; CHECK-NEXT: # %bb.6: # %space
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: .zero 1048576
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: # %bb.7: # %space
|
|
; CHECK-NEXT: sw s11, 0(sp)
|
|
; CHECK-NEXT: jump .LBB4_8, s11
|
|
entry:
|
|
%ra = call i32 asm sideeffect "addi ra, x0, 1", "={ra}"()
|
|
%t0 = call i32 asm sideeffect "addi t0, x0, 5", "={t0}"()
|
|
%t1 = call i32 asm sideeffect "addi t1, x0, 6", "={t1}"()
|
|
%t2 = call i32 asm sideeffect "addi t2, x0, 7", "={t2}"()
|
|
%s0 = call i32 asm sideeffect "addi s0, x0, 8", "={s0}"()
|
|
%s1 = call i32 asm sideeffect "addi s1, x0, 9", "={s1}"()
|
|
%a0 = call i32 asm sideeffect "addi a0, x0, 10", "={a0}"()
|
|
%a1 = call i32 asm sideeffect "addi a1, x0, 11", "={a1}"()
|
|
%a2 = call i32 asm sideeffect "addi a2, x0, 12", "={a2}"()
|
|
%a3 = call i32 asm sideeffect "addi a3, x0, 13", "={a3}"()
|
|
%a4 = call i32 asm sideeffect "addi a4, x0, 14", "={a4}"()
|
|
%a5 = call i32 asm sideeffect "addi a5, x0, 15", "={a5}"()
|
|
%a6 = call i32 asm sideeffect "addi a6, x0, 16", "={a6}"()
|
|
%a7 = call i32 asm sideeffect "addi a7, x0, 17", "={a7}"()
|
|
%s2 = call i32 asm sideeffect "addi s2, x0, 18", "={s2}"()
|
|
%s3 = call i32 asm sideeffect "addi s3, x0, 19", "={s3}"()
|
|
%s4 = call i32 asm sideeffect "addi s4, x0, 20", "={s4}"()
|
|
%s5 = call i32 asm sideeffect "addi s5, x0, 21", "={s5}"()
|
|
%s6 = call i32 asm sideeffect "addi s6, x0, 22", "={s6}"()
|
|
%s7 = call i32 asm sideeffect "addi s7, x0, 23", "={s7}"()
|
|
%s8 = call i32 asm sideeffect "addi s8, x0, 24", "={s8}"()
|
|
%s9 = call i32 asm sideeffect "addi s9, x0, 25", "={s9}"()
|
|
%s10 = call i32 asm sideeffect "addi s10, x0, 26", "={s10}"()
|
|
%s11 = call i32 asm sideeffect "addi s11, x0, 27", "={s11}"()
|
|
%t3 = call i32 asm sideeffect "addi t3, x0, 28", "={t3}"()
|
|
%t4 = call i32 asm sideeffect "addi t4, x0, 29", "={t4}"()
|
|
%t5 = call i32 asm sideeffect "addi t5, x0, 30", "={t5}"()
|
|
%t6 = call i32 asm sideeffect "addi t6, x0, 31", "={t6}"()
|
|
|
|
br label %cond_1
|
|
|
|
cond_1:
|
|
%cmp1 = icmp eq i32 %t5, %t6
|
|
br i1 %cmp1, label %dest_1, label %cond_2
|
|
|
|
cond_2:
|
|
%cmp2 = icmp eq i32 %t3, %t4
|
|
br i1 %cmp2, label %dest_2, label %cond_3
|
|
|
|
cond_3:
|
|
%cmp3 = icmp eq i32 %t1, %t2
|
|
br i1 %cmp3, label %dest_3, label %space
|
|
|
|
space:
|
|
call void asm sideeffect ".space 1048576", ""()
|
|
br label %dest_1
|
|
|
|
dest_1:
|
|
call void asm sideeffect "# dest 1", ""()
|
|
br label %dest_2
|
|
|
|
dest_2:
|
|
call void asm sideeffect "# dest 2", ""()
|
|
br label %dest_3
|
|
|
|
dest_3:
|
|
call void asm sideeffect "# dest 3", ""()
|
|
br label %tail
|
|
|
|
tail:
|
|
call void asm sideeffect "# reg use $0", "{ra}"(i32 %ra)
|
|
call void asm sideeffect "# reg use $0", "{t0}"(i32 %t0)
|
|
call void asm sideeffect "# reg use $0", "{t1}"(i32 %t1)
|
|
call void asm sideeffect "# reg use $0", "{t2}"(i32 %t2)
|
|
call void asm sideeffect "# reg use $0", "{s0}"(i32 %s0)
|
|
call void asm sideeffect "# reg use $0", "{s1}"(i32 %s1)
|
|
call void asm sideeffect "# reg use $0", "{a0}"(i32 %a0)
|
|
call void asm sideeffect "# reg use $0", "{a1}"(i32 %a1)
|
|
call void asm sideeffect "# reg use $0", "{a2}"(i32 %a2)
|
|
call void asm sideeffect "# reg use $0", "{a3}"(i32 %a3)
|
|
call void asm sideeffect "# reg use $0", "{a4}"(i32 %a4)
|
|
call void asm sideeffect "# reg use $0", "{a5}"(i32 %a5)
|
|
call void asm sideeffect "# reg use $0", "{a6}"(i32 %a6)
|
|
call void asm sideeffect "# reg use $0", "{a7}"(i32 %a7)
|
|
call void asm sideeffect "# reg use $0", "{s2}"(i32 %s2)
|
|
call void asm sideeffect "# reg use $0", "{s3}"(i32 %s3)
|
|
call void asm sideeffect "# reg use $0", "{s4}"(i32 %s4)
|
|
call void asm sideeffect "# reg use $0", "{s5}"(i32 %s5)
|
|
call void asm sideeffect "# reg use $0", "{s6}"(i32 %s6)
|
|
call void asm sideeffect "# reg use $0", "{s7}"(i32 %s7)
|
|
call void asm sideeffect "# reg use $0", "{s8}"(i32 %s8)
|
|
call void asm sideeffect "# reg use $0", "{s9}"(i32 %s9)
|
|
call void asm sideeffect "# reg use $0", "{s10}"(i32 %s10)
|
|
call void asm sideeffect "# reg use $0", "{s11}"(i32 %s11)
|
|
call void asm sideeffect "# reg use $0", "{t3}"(i32 %t3)
|
|
call void asm sideeffect "# reg use $0", "{t4}"(i32 %t4)
|
|
call void asm sideeffect "# reg use $0", "{t5}"(i32 %t5)
|
|
call void asm sideeffect "# reg use $0", "{t6}"(i32 %t6)
|
|
|
|
ret void
|
|
}
|
|
|