aed9d6d64a
This adds support for reserving GPRs such that the compiler will not choose a register for register allocation. The implementation follows the same design as for AArch64; each reserved register becomes a target feature and used for getting the reserved registers for a given MachineFunction. The backend checks that it does not need to write to any reserved register; if it does a relevant error is generated. Differential Revision: https://reviews.llvm.org/D67185
37 lines
1.9 KiB
LLVM
37 lines
1.9 KiB
LLVM
; RUN: not llc -mtriple=riscv32 -mattr=+reserve-x1 < %s 2>&1 | FileCheck %s -check-prefix=X1
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; RUN: not llc -mtriple=riscv64 -mattr=+reserve-x1 < %s 2>&1 | FileCheck %s -check-prefix=X1
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; RUN: not llc -mtriple=riscv32 -mattr=+reserve-x2 < %s 2>&1 | FileCheck %s -check-prefix=X2
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; RUN: not llc -mtriple=riscv64 -mattr=+reserve-x2 < %s 2>&1 | FileCheck %s -check-prefix=X2
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; RUN: not llc -mtriple=riscv32 -mattr=+reserve-x8 < %s 2>&1 | FileCheck %s -check-prefix=X8
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; RUN: not llc -mtriple=riscv64 -mattr=+reserve-x8 < %s 2>&1 | FileCheck %s -check-prefix=X8
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; RUN: not llc -mtriple=riscv32 -mattr=+reserve-x10 < %s 2>&1 | FileCheck %s -check-prefix=X10
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; RUN: not llc -mtriple=riscv64 -mattr=+reserve-x10 < %s 2>&1 | FileCheck %s -check-prefix=X10
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; RUN: llc -mtriple=riscv32 -mattr=+reserve-x11 < %s 2>&1 | FileCheck %s -check-prefix=X11
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; RUN: llc -mtriple=riscv32 -mattr=+reserve-x11 < %s 2>&1 | FileCheck %s -check-prefix=X11
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; RUN: llc -mtriple=riscv32 <%s
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; RUN: llc -mtriple=riscv64 <%s
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; This tests combinations when we would expect an error to be produced because
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; a reserved register is required by the default ABI. The final test checks no
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; errors are produced when no registers are reserved.
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define i32 @caller(i32 %a) #0 {
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; X1: in function caller {{.*}} Return address register required, but has been reserved.
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; X2: in function caller {{.*}} Stack pointer required, but has been reserved.
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; X8: in function caller {{.*}} Frame pointer required, but has been reserved.
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; X10: in function caller {{.*}} Argument register required, but has been reserved.
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; X10: in function caller {{.*}} Return value register required, but has been reserved.
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%call = call i32 @callee(i32 0)
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ret i32 %call
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}
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declare i32 @callee(i32 %a)
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define void @clobber() {
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; X11: warning: inline asm clobber list contains reserved registers: X11
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call void asm sideeffect "nop", "~{x11}"()
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ret void
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}
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attributes #0 = { "frame-pointer"="all" }
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