llvm-project/llvm/test/CodeGen/RISCV/rv64zkne-intrinsic.ll
Alex Bradbury 2ce0a5c8c3 [RISCV][test][NFC] Regenerate RISC-V tests with update_llc_test_checks.py -u
If a change alters more than a couple of tests it's really handy to be
able to regenerate any that were created by update_llc_test_checks.py
with something like `update_llc_test_checks.py -u
llvm/test/CodeGen/RISCV`. I noticed this causes some extraneous changes
(perhaps due to hand editing). This commit addresses that by updating
any fails that are modified by update_llc_test_checks.py -u.
2022-07-13 19:37:34 +01:00

26 lines
768 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -mattr=+zkne -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64ZKNE
declare i64 @llvm.riscv.aes64es(i64, i64);
define i64 @aes64es(i64 %a, i64 %b) nounwind {
; RV64ZKNE-LABEL: aes64es:
; RV64ZKNE: # %bb.0:
; RV64ZKNE-NEXT: aes64es a0, a0, a1
; RV64ZKNE-NEXT: ret
%val = call i64 @llvm.riscv.aes64es(i64 %a, i64 %b)
ret i64 %val
}
declare i64 @llvm.riscv.aes64esm(i64, i64);
define i64 @aes64esm(i64 %a, i64 %b) nounwind {
; RV64ZKNE-LABEL: aes64esm:
; RV64ZKNE: # %bb.0:
; RV64ZKNE-NEXT: aes64esm a0, a0, a1
; RV64ZKNE-NEXT: ret
%val = call i64 @llvm.riscv.aes64esm(i64 %a, i64 %b)
ret i64 %val
}