ea76b2d8d8
Add RISC-V support for XRay. The RV64 implementation has been tested in both QEMU and in our hardware environment. Currently this requires D and C extensions, but since both RV64GC and RVA22/RVA23 are becoming mainstream, I don't think this requirement will be a big problem. Based on the previous work by @a-poduval : https://reviews.llvm.org/D117929 --------- Co-authored-by: Ashwin Poduval <ashwin.poduval@gmail.com>
25 lines
1.1 KiB
LLVM
25 lines
1.1 KiB
LLVM
; RUN: llc -mtriple=riscv32-unknown-linux-gnu -mattr=+d,+c < %s | FileCheck --check-prefix=CHECK %s
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; RUN: llc -mtriple=riscv64-unknown-linux-gnu -mattr=+d,+c < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-RISCV64 %s
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define i32 @foo() nounwind "function-instrument"="xray-always" {
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; CHECK: .p2align 2
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; CHECK-LABEL: .Lxray_sled_0:
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; CHECK-NEXT: j .Ltmp0
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; CHECK-COUNT-21: nop
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; CHECK-RISCV64-COUNT-12: nop
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; CHECK-LABEL: .Ltmp0:
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ret i32 0
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; CHECK: .p2align 2
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; CHECK-LABEL: .Lxray_sled_1:
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; CHECK-NEXT: j .Ltmp1
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; CHECK-COUNT-21: nop
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; CHECK-RISCV64-COUNT-12: nop
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; CHECK-LABEL: .Ltmp1:
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; CHECK-NEXT: ret
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}
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; CHECK: .section xray_instr_map,"ao",@progbits,foo
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; CHECK-LABEL: .Lxray_sleds_start0:
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; CHECK: .Lxray_sled_0-[[TMP:.Ltmp[0-9]+]]
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; CHECK: .Lxray_sled_1-[[TMP:.Ltmp[0-9]+]]
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; CHECK-LABEL: .Lxray_sleds_end0:
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