4e4cb4359a
The comment shows that at the time we were worried about producing the alias in assembly that might be ingested by a binutils version that doesn't yet support it. binutils gained support over 4 years ago <https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=c2137f55ad04e451d834048d4bfec1de2daea20e>. With all the changes in areas such as ELF attributes, if you tried to use LLVM's RISC-V assembler output with a binutils that old then zext.b would be the least of your worries.
87 lines
2.0 KiB
LLVM
87 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zba,+zbb,+zcb | FileCheck %s
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define i64 @c_not(i64 %x, i64 %y, i64 %z) {
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; CHECK-LABEL: c_not:
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; CHECK: # %bb.0:
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; CHECK-NEXT: not a1, a1
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; CHECK-NEXT: li a0, 1234
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; CHECK-NEXT: mul a0, a0, a1
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; CHECK-NEXT: ret
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%a = xor i64 %y, -1
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%b = mul i64 %a, 1234
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ret i64 %b
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}
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define i64 @c_mul(i64 %x, i64 %y, i64 %z, i64 %w) {
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; CHECK-LABEL: c_mul:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mul a1, a1, a2
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; CHECK-NEXT: lui a0, 1
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; CHECK-NEXT: or a0, a0, a1
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; CHECK-NEXT: ret
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%a = mul i64 %y, %z
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%b = or i64 %a, 4096
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ret i64 %b
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}
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define i64 @c_sext_b(i64 %x, i8 %y, i64 %z) {
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; CHECK-LABEL: c_sext_b:
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; CHECK: # %bb.0:
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; CHECK-NEXT: sext.b a1, a1
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; CHECK-NEXT: lui a0, 1
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; CHECK-NEXT: or a0, a0, a1
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; CHECK-NEXT: ret
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%a = sext i8 %y to i64
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%b = or i64 %a, 4096
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ret i64 %b
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}
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define i64 @c_sext_h(i64 %x, i16 %y, i64 %z) {
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; CHECK-LABEL: c_sext_h:
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; CHECK: # %bb.0:
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; CHECK-NEXT: sext.h a1, a1
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; CHECK-NEXT: lui a0, 1
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; CHECK-NEXT: or a0, a0, a1
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; CHECK-NEXT: ret
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%a = sext i16 %y to i64
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%b = or i64 %a, 4096
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ret i64 %b
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}
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define i64 @c_zext_b(i64 %x, i8 %y, i64 %z) {
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; CHECK-LABEL: c_zext_b:
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; CHECK: # %bb.0:
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; CHECK-NEXT: zext.b a1, a1
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; CHECK-NEXT: lui a0, 1
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; CHECK-NEXT: or a0, a0, a1
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; CHECK-NEXT: ret
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%a = zext i8 %y to i64
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%b = or i64 %a, 4096
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ret i64 %b
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}
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define i64 @c_zext_h(i64 %x, i16 %y) {
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; CHECK-LABEL: c_zext_h:
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; CHECK: # %bb.0:
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; CHECK-NEXT: zext.h a1, a1
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; CHECK-NEXT: lui a0, 4096
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; CHECK-NEXT: or a0, a0, a1
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; CHECK-NEXT: ret
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%a = zext i16 %y to i64
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%b = or i64 %a, 16777216
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ret i64 %b
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}
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define i64 @c_zext_w(i64 %x, i32 %y) {
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; CHECK-LABEL: c_zext_w:
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; CHECK: # %bb.0:
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; CHECK-NEXT: zext.w a1, a1
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; CHECK-NEXT: li a0, 1234
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; CHECK-NEXT: mul a0, a0, a1
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; CHECK-NEXT: ret
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%a = zext i32 %y to i64
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%b = mul i64 %a, 1234
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ret i64 %b
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}
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