
LLDB uses the LLVM disassembler to determine the size of instructions and to do the actual disassembly. Currently, if the LLVM disassembler can't disassemble an instruction, LLDB will ignore the instruction size, assume the instruction size is the minimum size for that device, print no useful opcode, and print nothing for the instruction. This patch changes this behavior to separate the instruction size and "can't disassemble". If the LLVM disassembler knows the size, but can't dissasemble the instruction, LLDB will use that size. It will print out the opcode, and will print "<unknown>" for the instruction. This is much more useful to both a user and a script. The impetus behind this change is to clean up RISC-V disassembly when the LLVM disassembler doesn't understand all of the instructions. RISC-V supports proprietary extensions, where the TD files don't know about certain instructions, and the disassembler can't disassemble them. Internal users want to be able to disassemble these instructions. With llvm-objdump, the solution is to pipe the output of the disassembly through a filter program. This patch modifies LLDB's disassembly to look more like llvm-objdump's, and includes an example python script that adds a command "fdis" that will disassemble, then pipe the output through a specified filter program. This has been tested with crustfilt, a sample filter located at https://github.com/quic/crustfilt . Changes in this PR: - Decouple "can't disassemble" with "instruction size". DisassemblerLLVMC::MCDisasmInstance::GetMCInst now returns a bool for valid disassembly, and has the size as an out paramter. Use the size even if the disassembly is invalid. Disassemble if disassemby is valid. - Always print out the opcode when -b is specified. Previously it wouldn't print out the opcode if it couldn't disassemble. - Print out RISC-V opcodes the way llvm-objdump does. Code for the new Opcode Type eType16_32Tuples by Jason Molenda. - Print <unknown> for instructions that can't be disassembled, matching llvm-objdump, instead of printing nothing. - Update max riscv32 and riscv64 instruction size to 8. - Add example "fdis" command script. - Added disassembly byte test for x86 with known and unknown instructions. - Added disassembly byte test for riscv32 with known and unknown instructions, with and without filtering. - Added test from Jason Molenda to RISC-V disassembly unit tests.
29 lines
1.1 KiB
ArmAsm
29 lines
1.1 KiB
ArmAsm
# REQUIRES: x86
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# This test verifies that disassemble -b prints out the correct bytes and
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# format for x86_64 instructions of various sizes, and that an unknown
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# instruction shows the opcode and disassembles as "<unknown>"
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# RUN: llvm-mc -filetype=obj --triple=x86_64-unknown-unknown %s -o %t
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# RUN: %lldb -b %t -o "disassemble -b -n main" | FileCheck %s
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main: # @main
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subq $0x18, %rsp
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movl $0x0, 0x14(%rsp)
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movq %rdx, 0x8(%rsp)
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movl %ecx, 0x4(%rsp)
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movl (%rsp), %eax
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addq $0x18, %rsp
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retq
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.byte 0x6
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# CHECK: [0x0] <+0>: 48 83 ec 18 subq $0x18, %rsp
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# CHECK-NEXT: [0x4] <+4>: c7 44 24 14 00 00 00 00 movl $0x0, 0x14(%rsp)
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# CHECK-NEXT: [0xc] <+12>: 48 89 54 24 08 movq %rdx, 0x8(%rsp)
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# CHECK-NEXT: [0x11] <+17>: 89 4c 24 04 movl %ecx, 0x4(%rsp)
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# CHECK-NEXT: [0x15] <+21>: 8b 04 24 movl (%rsp), %eax
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# CHECK-NEXT: [0x18] <+24>: 48 83 c4 18 addq $0x18, %rsp
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# CHECK-NEXT: [0x1c] <+28>: c3 retq
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# CHECK-NEXT: [0x1d] <+29>: 06 <unknown>
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