0d0018e709
Summary of changes: - Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205). - Enable VOP3 variants of dot2c/dot4c/dot8c instructions (https://reviews.llvm.org/D138494). - Enable omod modifiers for v_max3_f16, v_min3_f16, etc. (https://reviews.llvm.org/D139469). - Enable abs and neg modifiers for v_cndmask_b32 (https://reviews.llvm.org/D135900). - Correct v_mov_b32_sdwa (it does not support abs and neg input modifiers yet). - Enable abs and neg modifiers for v_dot2c_f32_f16_dpp. - Minor corrections and improvements.
21 lines
812 B
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21 lines
812 B
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* Automatically generated file, do not edit! *
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.. _amdgpu_synid_gfx90a_vdata_cbb01e:
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vdata
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=====
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Image data to store by an *image_store* instruction.
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*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`d16<amdgpu_synid_d16>`:
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* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits, depending on :ref:`d16<amdgpu_synid_d16>`.
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* :ref:`d16<amdgpu_synid_d16>` specifies that data in registers are packed; each value occupies 16 bits.
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*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
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