e6bf48d110
As of rev ea222be0d, LLVMs assembler will actually try to honour the "fill value" part of p2align directives. X86 printed these as 0x90, which isn't actually what it wanted: we want multi-byte nops for .text padding. Compiling via a textual assembly file produces single-byte nop padding since ea222be0d but the built-in assembler will produce multi-byte nops. This divergent behaviour is undesirable. To fix: don't set the byte padding field for x86, which allows the assembler to pick multi-byte nops. Test that we get the same multi-byte padding when compiled via textual assembly or directly to object file. Added same-align-bytes-with-llasm-llobj.ll to that effect, updated numerous other tests to not contain check-lines for the explicit padding.
35 lines
1.1 KiB
LLVM
35 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-pc-linux -mcpu=corei7 | FileCheck %s
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define i64 @atomicSub(ptr %a, i64 %b) nounwind {
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; CHECK-LABEL: atomicSub:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: pushl %ebx
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; CHECK-NEXT: movl (%ebp), %eax
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; CHECK-NEXT: movl 4(%ebp), %edx
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_1: # %atomicrmw.start
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movl %eax, %ebx
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; CHECK-NEXT: subl %edi, %ebx
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: sbbl %esi, %ecx
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; CHECK-NEXT: lock cmpxchg8b (%ebp)
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; CHECK-NEXT: jne .LBB0_1
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; CHECK-NEXT: # %bb.2: # %atomicrmw.end
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: popl %ebx
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: retl
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entry:
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%0 = atomicrmw sub ptr %a, i64 %b seq_cst
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ret i64 %0
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}
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