20b5728b7b
Implement the following implications according to the [Zc spec](https://github.com/riscvarchive/riscv-code-size-reduction/blob/main/Zc-specification/Zc.adoc#13-c) > As C defines the same instructions as Zca, Zcf and Zcd, the rule is that: > * C always implies Zca > * C+F implies Zcf (RV32 only) > * C+D implies Zcd
30 lines
896 B
ArmAsm
30 lines
896 B
ArmAsm
## Test llvm-mc could handle .attribute correctly.
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# RUN: llvm-mc %s -triple=riscv32 -filetype=asm | FileCheck %s
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# RUN: llvm-mc %s -triple=riscv64 -filetype=asm | FileCheck %s
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# RUN: llvm-mc %s -triple=riscv32 -filetype=asm -riscv-add-build-attributes \
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# RUN: | FileCheck %s
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# RUN: llvm-mc %s -triple=riscv64 -filetype=asm -riscv-add-build-attributes \
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# RUN: | FileCheck %s
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.attribute stack_align, 16
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# CHECK: attribute 4, 16
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.attribute arch, "rv32i2p1_m2p0_a2p1_c2p0_zmmul1p0_zaamo1p0_zalrsc1p0"
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# CHECK: attribute 5, "rv32i2p1_m2p0_a2p1_c2p0_zmmul1p0_zaamo1p0_zalrsc1p0_zca1p0"
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.attribute unaligned_access, 0
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# CHECK: attribute 6, 0
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.attribute priv_spec, 2
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# CHECK: attribute 8, 2
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.attribute priv_spec_minor, 0
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# CHECK: attribute 10, 0
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.attribute priv_spec_revision, 0
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# CHECK: attribute 12, 0
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.attribute atomic_abi, 0
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# CHECK: attribute 14, 0
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