Qihan Cai 5f0515debd

[RISCV] Support Remaining P Extension Instructions for RV32/64 (#150379) ...

This patch implements pages 15-17 from
jhauser.us/RISCV/ext-P/RVP-instrEncodings-015.pdf

Documentation:
jhauser.us/RISCV/ext-P/RVP-baseInstrs-014.pdf
jhauser.us/RISCV/ext-P/RVP-instrEncodings-015.pdf

2025-08-20 22:54:07 +10:00

..

corev

[RISCV] Check that both registers of a CV Reg-Reg memory address are GPRs. (#136079)

2025-04-17 12:39:40 -07:00

Relocations

[RISCV] Track Linker Relaxable through Assembly Relaxation (#152602)

2025-08-12 09:02:48 +01:00

rvv

[RISCV] Basic Objdump Mapping Symbol Support (#151452)

2025-08-07 11:28:07 -07:00

align-fill-byte-zero.s

[MC] Honour alignment directive fill value for non-intel (#100136)

2024-07-24 18:24:39 +01:00

align-option-relax.s

MC: Refine ALIGN relocation conditions

2025-08-07 19:16:58 -07:00

align.s

MC: Refine ALIGN relocation conditions

2025-08-07 19:16:58 -07:00

attribute-arch-invalid.s

[RISCV] Remove experimental for bf16 extensions (#97996)

2024-07-09 14:34:03 +08:00

attribute-arch-sifive.s

[RISCV] Add MC layer support for XSfmm*. (#133031)

2025-05-21 08:26:35 -07:00

attribute-arch.s

[RISCV] Support Remaining P Extension Instructions for RV32/64 (#150379)

2025-08-20 22:54:07 +10:00

attribute-with-insts.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

attribute-with-option.s

…

attribute.s

[RISCV] Implement the implications of C extension (#132259)

2025-03-22 14:48:52 +08:00

cfi-advance.s

MC: Refine ALIGN relocation conditions

2025-08-07 19:16:58 -07:00

cfi-regs-invalid.s

…

cfi-regs-valid.s

…

cnop.s

…

compress-cjal.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

compress-debug-info.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

compress-rv32d.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

compress-rv32f.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

compress-rv32i.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

compress-rv64i.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

compressed-relocations.s

[RISCV,test] Remove CHECK lines for MCAsmStreamer's fixup output

2025-04-18 20:33:40 -07:00

compressed-zicfiss.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

csr-aliases.s

[RISCV] Enable floating point CSR alias mnemonics for Zfinx. (#108464)

2024-09-12 18:40:52 -07:00

custom_reloc.s

[RISCV] Add symbol parsing support for XAndesPerf branch instructions (#137748)

2025-06-20 09:06:57 +08:00

data-directives-invalid.s

…

data-directives-valid.s

…

debug-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

default-build-attributes.s

[RISCV] Make M imply Zmmul (#95070)

2024-06-21 11:11:10 +08:00

deprecated-csr-names.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

directive-variant_cc.s

…

eflags-option-directive.s

…

elf-flags.s

Reapply "[RISCV] Remove experimental from Ztso. (#96465)"

2024-07-09 10:45:56 -07:00

elf-header.s

…

emit-x8-as-fp.s

[RISCV][MC] Emit x8 as fp instead of s0 (#135500)

2025-04-14 14:48:47 +08:00

empty-string.s

…

fde-reloc.s

[MC] Rename temporary symbols of empty name to ".L0 " (#89693)

2024-04-26 08:30:27 -07:00

fixups-compressed.s

[RISCV,test] Remove CHECK lines for MCAsmStreamer's fixup output

2025-04-18 20:33:40 -07:00

fixups-diagnostics.s

MCFixup: Improve location accuracy and remove MCFixup::Loc

2025-07-04 12:06:28 -07:00

fixups-invalid.s

…

fixups.s

[RISCV,test] Remove CHECK lines for MCAsmStreamer's fixup output

2025-04-18 20:33:40 -07:00

fp-default-rounding-mode.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

fp-inx-default-rounding-mode.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

function-call-invalid.s

RISCVAsmParser: Reject call foo@invalid

2025-04-13 11:07:25 -07:00

function-call.s

[test] Remove CHECK lines for MCAsmStreamer's fixup output

2025-04-17 18:55:20 -07:00

hilo-constaddr-expr.s

[RISCV] Allow RISCVMCExpr folding in the absence of linker relaxaxation

2025-03-15 11:25:30 -07:00

hilo-constaddr.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

hypervisor-csr-names.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

insn_c-invalid.s

[RISCV][MC] Support Assembling 48- and 64-bit Instructions (#110022)

2024-10-08 14:09:07 +01:00

insn_c.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

insn_xqci-invalid.s

Reland [RISCV] Add Xqci Insn Formats (#134134)

2025-04-02 21:37:44 -07:00

insn_xqci.s

Reland [RISCV] Add Xqci Insn Formats (#134134)

2025-04-02 21:37:44 -07:00

insn-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

insn.s

RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants

2025-03-29 11:12:40 -07:00

invalid-attribute.s

Reapply "[RISCV] Support RISCV Atomics ABI attributes (#84597)"

2024-07-02 08:23:03 -07:00

invalid-instruction-spellcheck.s

…

large-instructions.test

[RISCV] Basic Objdump Mapping Symbol Support (#151452)

2025-08-07 11:28:07 -07:00

linker-relaxation.s

RISCV: Remove shouldForceRelocation and unneeded relocations

2025-05-23 18:44:15 -07:00

lit.local.cfg

…

long-conditional-jump.s

RISCV: Remove shouldForceRelocation and unneeded relocations

2025-05-23 18:44:15 -07:00

machine-csr-names.s

[RISCV] Add smcntrpmf extension (#136556)

2025-04-22 12:34:39 +08:00

mapping-across-sections.s

[RISCV] Create mapping symbols with non-unique names

2024-07-22 23:07:27 -07:00

mapping-within-section.s

…

nop-slide.s

MC: Refine ALIGN relocation conditions

2025-08-07 19:16:58 -07:00

numeric-reg-names-d.s

…

numeric-reg-names-f.s

…

numeric-reg-names.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

option-arch.s

[RISCV] Implement the implications of C extension (#132259)

2025-03-22 14:48:52 +08:00

option-exact-long-jump-disable.s

MCFixup: Improve location accuracy and remove MCFixup::Loc

2025-07-04 12:06:28 -07:00

option-exact.s

[test] Remove CHECK lines for MCAsmStreamer's fixup output

2025-04-17 18:55:20 -07:00

option-invalid.s

[RISCV] Support .option {no}exact (#122483)

2025-03-26 11:14:16 -07:00

option-mix.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

option-nopic.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

option-pic.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

option-pushpop.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

option-relax.s

RISCV: Remove shouldForceRelocation and unneeded relocations

2025-05-23 18:44:15 -07:00

option-rvc.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

pcrel-fixups.s

[RISCV] Avoid calling isSymbolRefDifferenceFullyResolvedImpl. NFC

2024-09-20 19:41:11 -07:00

pcrel-lo12-invalid.s

MCFixup: Improve location accuracy and remove MCFixup::Loc

2025-07-04 12:06:28 -07:00

print-imm-hex.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

priv-invalid.s

…

priv-rv64-invalid.s

…

priv-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

pseudo-jump-invalid.s

[MC] Add UseAtForSpecifier

2025-04-01 00:06:05 -07:00

pseudo-jump.s

[test] Remove CHECK lines for MCAsmStreamer's fixup output

2025-04-17 18:55:20 -07:00

reloc-addend.s

…

reloc-directive-err.s

MC,test: Migrate away from the .reloc constant hack

2025-07-16 22:53:18 -07:00

reloc-directive.s

MC,test: Migrate away from the .reloc constant hack

2025-07-16 22:53:18 -07:00

riscv64-64b-pcrel.s

…

rv32-hypervisor-csr-names.s

[RISCV] Support [mh]edelegh CSRs (#121634)

2025-02-16 13:41:46 -08:00

rv32-machine-csr-names.s

[RISCV] Add smcntrpmf extension (#136556)

2025-04-22 12:34:39 +08:00

rv32-only-csr-names.s

[RISCV] Support [mh]edelegh CSRs (#121634)

2025-02-16 13:41:46 -08:00

rv32-relaxation-xqci.s

MCFixup: Improve location accuracy and remove MCFixup::Loc

2025-07-04 12:06:28 -07:00

rv32-relaxation.s

[test] Improve linker-relaxable fixups tests

2025-05-21 22:08:55 -07:00

rv32-supervisor-csr-names.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32-user-csr-names.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32c-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32c-fuzzed-invalid.s

…

rv32c-invalid.s

[RISCV] Accept c.slli/c.srli/c.srli with a 0 immediate as hints. (#150689)

2025-07-26 00:05:33 -07:00

rv32c-only-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32d-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

rv32dc-invalid.s

…

rv32dc-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32e-xqccmp-invalid.s

[RISCV] Improve error for using x18-x27 in a register list with RVE. (#133936)

2025-04-01 11:14:25 -07:00

rv32e-zcmp-invalid.s

[RISCV] Improve error for using x18-x27 in a register list with RVE. (#133936)

2025-04-01 11:14:25 -07:00

rv32f-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

rv32fc-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32fc-invalid.s

…

rv32fc-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32h-invalid.s

…

rv32i-aliases-invalid.s

[MC] Add UseAtForSpecifier

2025-04-01 00:06:05 -07:00

rv32i-aliases-valid.s

RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants

2025-03-29 11:12:40 -07:00

rv32i-invalid.s

[RISCV] Replace @plt/@gotpcrel in data directives with %pltpcrel %gotpcrel

2025-03-29 11:08:13 -07:00

rv32i-only-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32m-invalid.s

…

rv32p-invalid.s

[RISCV] Add P-ext MC support for pli.dh, pli.db, and plui.dh. (#153972)

2025-08-18 08:23:14 -07:00

rv32p-valid.s

[RISCV] Support Remaining P Extension Instructions for RV32/64 (#150379)

2025-08-20 22:54:07 +10:00

rv32q-invalid.s

[RISCV][MC] Add support for Q extension (#139369)

2025-05-15 10:51:06 +08:00

rv32xqccmp-invalid.s

[RISCV] Refactor register list parsing and improve error messages. (#134938)

2025-04-14 17:49:28 -07:00

rv32xqccmp-valid.s

[RISCV][Xqccmp] Correctly Parse/Disassemble pushfp (#133188)

2025-03-27 17:43:26 -07:00

rv32xtheadbs-invalid.s

…

rv32xtheadfmemidx-d-invalid.s

…

rv32xtheadfmemidx-f-invalid.s

…

rv32xtheadfmemidx-valid.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

rv32xtheadmac-invalid.s

…

rv32xtheadmac-valid.s

…

rv32xtheadmemidx-invalid.s

…

rv32xtheadmemidx-valid.s

…

rv32xtheadmempair-invalid.s

Recommit "[RISCV] Strengthen register usage validation for XTheadMemPair loads (#136241)"

2025-04-17 21:55:16 -07:00

rv32xtheadmempair-valid.s

…

rv32zaamo-invalid.s

[RISCV] Bump Zaamo and Zalrsc to version 1.0 (#91556)

2024-05-21 12:04:46 +08:00

rv32zacas-invalid.s

[RISCV] Mark Zacas as non-experimental (#109651)

2024-09-25 06:14:43 +01:00

rv32zalasr-invalid.s

[RISCV][MC] MC layer support for the experimental zalasr extension (#79911)

2024-02-01 10:58:21 -08:00

rv32zalrsc-invalid.s

[RISCV] Bump Zaamo and Zalrsc to version 1.0 (#91556)

2024-05-21 12:04:46 +08:00

rv32zba-invalid.s

…

rv32zbb-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32zbb-invalid.s

…

rv32zbb-only-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32zbc-invalid.s

…

rv32zbkb-only-valid.s

[RISCV] Rework zext.h handling for Zbkb again. (#96957)

2024-06-27 21:35:33 -07:00

rv32zbkc-invalid.s

…

rv32zbkx-invalid.s

…

rv32zbs-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32zbs-invalid.s

…

rv32zcibop-valid-rv32.s

[RISCV] Fix More RV32 Signed Immediates (#120658)

2024-12-21 09:48:31 +00:00

rv32zclsd-alias-valid.c

[RISCV] Add ($rs1) InstAliases with no immediate for Zilsd/Zclsd. (#132094)

2025-03-19 15:35:51 -07:00

rv32zclsd-invalid.s

[RISCV] Add Zilsd and Zclsd Extensions (#131094)

2025-03-19 08:53:41 -07:00

rv32zclsd-valid.s

[RISCV] Add Zilsd and Zclsd Extensions (#131094)

2025-03-19 08:53:41 -07:00

rv32zcmop-invalid.s

[RISCV] Correct the spelling of the Zcmop mnemonics. (#88826)

2024-04-15 22:33:14 -07:00

rv32zcmp-invalid.s

[RISCV] Refactor register list parsing and improve error messages. (#134938)

2025-04-14 17:49:28 -07:00

rv32zcmp-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32zdinx-invalid.s

[RISCV] Fix fneg.d/fabs.d aliasing handling for Zdinx. Add missing fmv.s/d aliases.

2024-09-10 11:44:04 -07:00

rv32zfa-only-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32zfh-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

rv32zfinx-invalid.s

[RISCV] Fix fneg.d/fabs.d aliasing handling for Zdinx. Add missing fmv.s/d aliases.

2024-09-10 11:44:04 -07:00

rv32zhinx-invalid.s

…

rv32zhinxmin-invalid.s

…

rv32zilsd-alias-valid.s

[RISCV] Add ($rs1) InstAliases with no immediate for Zilsd/Zclsd. (#132094)

2025-03-19 15:35:51 -07:00

rv32zilsd-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

rv32zilsd-pseudos.s

[RISCV] Support Load/Store Global assembler pseudos for Zilsd. (#134950)

2025-04-08 21:33:08 -07:00

rv32zilsd-valid.s

[RISCV] Add Zilsd and Zclsd Extensions (#131094)

2025-03-19 08:53:41 -07:00

rv32zimop-invalid.s

[RISCV] Zimop/Zcmop are ratified

2024-04-08 16:40:02 +08:00

rv32zknd-only-invalid.s

…

rv32zknd-only-valid.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

rv32zkne-only-invalid.s

…

rv32zkne-only-valid.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

rv32zknh-only-valid.s

…

rv32zksed-invalid.s

…

rv32zmmul-invaild.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv32zmmul-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64-machine-csr-names.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64-relax-all.s

[RISCV] Don't delete all fixups in RISCVMCCodeEmitter::expandLongCondBr. (#109513)

2024-09-22 22:31:36 -07:00

rv64-relaxation.s

[test] Improve linker-relaxable fixups tests

2025-05-21 22:08:55 -07:00

rv64-user-csr-names.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64a-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64c-aliases-valid.s

[RISCV] Use addi rather than addiw for immediates materialised by lui+addi(w) pairs when possible (#141663)

2025-06-02 22:24:50 +01:00

rv64c-hints-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64c-invalid.s

[RISCV] Accept c.slli/c.srli/c.srli with a 0 immediate as hints. (#150689)

2025-07-26 00:05:33 -07:00

rv64c-valid.s

[RISCV] Add Zilsd and Zclsd Extensions (#131094)

2025-03-19 08:53:41 -07:00

rv64d-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64d-invalid.s

…

rv64d-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64dc-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64e-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64e-xqccmp-invalid.s

[RISCV] Improve error for using x18-x27 in a register list with RVE. (#133936)

2025-04-01 11:14:25 -07:00

rv64e-xqccmp-valid.s

[RISCV][Xqccmp] Correctly Parse/Disassemble pushfp (#133188)

2025-03-27 17:43:26 -07:00

rv64e-zcmp-invalid.s

[RISCV] Improve error for using x18-x27 in a register list with RVE. (#133936)

2025-04-01 11:14:25 -07:00

rv64e-zcmp-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64f-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64f-invalid.s

…

rv64f-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64h-invalid.s

…

rv64i-aliases-invalid.s

[MC] Add UseAtForSpecifier

2025-04-01 00:06:05 -07:00

rv64i-aliases-valid.s

[RISCV] Use addi rather than addiw for immediates materialised by lui+addi(w) pairs when possible (#141663)

2025-06-02 22:24:50 +01:00

rv64i-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

rv64i-pseudos.s

…

rv64i-valid.s

RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants

2025-03-29 11:12:40 -07:00

rv64ih-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64m-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64p-invalid.s

[RISCV] Add P-ext MC support for pli.dh, pli.db, and plui.dh. (#153972)

2025-08-18 08:23:14 -07:00

rv64p-valid.s

[RISCV] Support Remaining P Extension Instructions for RV32/64 (#150379)

2025-08-20 22:54:07 +10:00

rv64q-invalid.s

[RISCV][MC] Add support for Q extension (#139369)

2025-05-15 10:51:06 +08:00

rv64q-valid.s

[RISCV][MC] Add support for Q extension (#139369)

2025-05-15 10:51:06 +08:00

rv64xqccmp-invalid.s

[RISCV] Refactor register list parsing and improve error messages. (#134938)

2025-04-14 17:49:28 -07:00

rv64xqccmp-valid.s

[RISCV][Xqccmp] Correctly Parse/Disassemble pushfp (#133188)

2025-03-27 17:43:26 -07:00

rv64xtheadbs-invalid.s

…

rv64xtheadfmemidx-invalid.s

…

rv64xtheadfmemidx-valid.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

rv64xtheadmac-valid.s

…

rv64xtheadmemidx-invalid.s

Reland [RISCV] Add Xqci Insn Formats (#134134)

2025-04-02 21:37:44 -07:00

rv64xtheadmemidx-valid.s

…

rv64xtheadmempair-invalid.s

Recommit "[RISCV] Strengthen register usage validation for XTheadMemPair loads (#136241)"

2025-04-17 21:55:16 -07:00

rv64xtheadmempair-valid.s

…

rv64zaamo-invalid.s

[RISCV] Bump Zaamo and Zalrsc to version 1.0 (#91556)

2024-05-21 12:04:46 +08:00

rv64zaamo-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zacas-invalid.s

[RISCV] Mark Zacas as non-experimental (#109651)

2024-09-25 06:14:43 +01:00

rv64zacas-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zalasr-invalid.s

[RISCV][MC] MC layer support for the experimental zalasr extension (#79911)

2024-02-01 10:58:21 -08:00

rv64zalasr-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zalrsc-invalid.s

[RISCV] Bump Zaamo and Zalrsc to version 1.0 (#91556)

2024-05-21 12:04:46 +08:00

rv64zalrsc-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zba-aliases-valid.s

[RISCV] Use addi rather than addiw for immediates materialised by lui+addi(w) pairs when possible (#141663)

2025-06-02 22:24:50 +01:00

rv64zba-invalid.s

…

rv64zba-valid.s

…

rv64zbb-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zbb-invalid.s

…

rv64zbb-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zbkb-valid.s

[RISCV] Rework zext.h handling for Zbkb again. (#96957)

2024-06-27 21:35:33 -07:00

rv64zbs-aliases-valid.s

[RISCV] Use addi rather than addiw for immediates materialised by lui+addi(w) pairs when possible (#141663)

2025-06-02 22:24:50 +01:00

rv64zbs-invalid.s

…

rv64zcb-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zcmp-invalid.s

[RISCV] Refactor register list parsing and improve error messages. (#134938)

2025-04-14 17:49:28 -07:00

rv64zcmp-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zdinx-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

rv64zdinx-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zfa-only-valid.s

[RISCV][MC] Add Q support for Zfa (#139508)

2025-05-15 10:54:16 +08:00

rv64zfh-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

rv64zfh-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zfinx-invalid.s

…

rv64zfinx-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zhinx-invalid.s

…

rv64zhinx-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zhinxmin-invalid.s

…

rv64zhinxmin-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zknd-only-valid.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

rv64zkne-only-invalid.s

…

rv64zkne-only-valid.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

rv64zknh-only-valid.s

…

rv64zksed-invalid.s

…

rv64zmmul-invalid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rv64zmmul-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rva-aliases-invalid.s

…

rva-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvc-aliases-valid.s

[RISCV] Correct the register class in the C_SWSP and C_SDSP InstAliases. (#132086)

2025-03-19 15:34:33 -07:00

rvc-hints-invalid.s

[RISCV] Accept c.slli/c.srli/c.srli with a 0 immediate as hints. (#150689)

2025-07-26 00:05:33 -07:00

rvc-hints-valid.s

[RISCV] Accept c.slli/c.srli/c.srli with a 0 immediate as hints. (#150689)

2025-07-26 00:05:33 -07:00

rvc-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvd-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvd-pseudos.s

…

rvd-valid.s

RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants

2025-03-29 11:12:40 -07:00

rvdc-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rve-invalid.s

[RISCV] Merge some of the C_*_HINT instruction into the regular C_* instructions. (#150710)

2025-07-25 20:55:15 -07:00

rve-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvf-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvf-pseudos.s

…

rvf-user-csr-names.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvf-valid.s

RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants

2025-03-29 11:12:40 -07:00

rvi-aliases-valid.s

[RISCV] Increase EmitPriority on some InstAliases. NFC

2024-09-12 19:33:59 -07:00

rvi-alternate-abi-names.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

rvi-pseudos-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

rvi-pseudos.s

[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)

2025-03-30 22:03:14 -07:00

rvi-valid.s

RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants

2025-03-29 11:12:40 -07:00

rvih-aliases-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvih-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvk-user-csr-name.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvm-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvq-aliases-valid.s

[RISCV][MC] Add support for Q extension (#139369)

2025-05-15 10:51:06 +08:00

rvq-pseudos.s

[RISCV][MC] Add support for Q extension (#139369)

2025-05-15 10:51:06 +08:00

rvq-valid.s

[RISCV][MC] Add support for Q extension (#139369)

2025-05-15 10:51:06 +08:00

rvv-user-csr-names.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvxtheadbs-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzaamo-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzabha-invalid.s

[RISCV] Remove experimental from Zabha (#93831)

2024-06-03 17:27:02 +08:00

rvzabha-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzabha-zacas-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzacas-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzalasr-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzalrsc-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzba-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzbb-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzbc-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzbkb-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzbkc-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzbkx-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzbs-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzcb-invalid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzcb-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzcmop-valid.s

[RISCV] Correct the spelling of the Zcmop mnemonics. (#88826)

2024-04-15 22:33:14 -07:00

rvzcmt-invalid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzcmt-user-csr-name.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzcmt-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzdinx-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzdinx-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzfbfmin-aliases-valid.s

[RISCV] Correct the predicates for the flh/fsh InstAlias and assembler pseudos to include Zfbfmin. (#131920)

2025-03-18 17:55:36 -07:00

rvzfbfmin-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

rvzfbfmin-valid.s

RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants

2025-03-29 11:12:40 -07:00

rvzfh-aliases-valid.s

[RISCV] Remove unnecessary alias tests from rvzfh-aliases-valid.s. NFC

2025-03-18 14:41:06 -07:00

rvzfh-pseudos.s

[RISCV] Correct the predicates for the flh/fsh InstAlias and assembler pseudos to include Zfbfmin. (#131920)

2025-03-18 17:55:36 -07:00

rvzfh-valid.s

RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants

2025-03-29 11:12:40 -07:00

rvzfhmin-aliases-valid.s

[RISCV] Correct the predicates for the flh/fsh InstAlias and assembler pseudos to include Zfbfmin. (#131920)

2025-03-18 17:55:36 -07:00

rvzfhmin-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

rvzfhmin-valid.s

RISCVAsmParser: Don't treat operands with relocation specifier as parse-time constants

2025-03-29 11:12:40 -07:00

rvzfinx-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzfinx-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzhinx-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzhinx-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzhinxmin-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzicbom-invalid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzicbom-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzicbop-invalid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzicbop-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzicboz-invalid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzicboz-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzicond-invalid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzicond-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzihintntl-invalid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzihintntl-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzihintntlc-invalid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzihintntlc-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzihintpause-aliases-valid.s

…

rvzihintpause-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

rvzimop-valid.s

[RISCV] Zimop/Zcmop are ratified

2024-04-08 16:40:02 +08:00

rvzknh-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzksed-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

rvzksh-valid.s

[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)

2024-12-23 14:47:03 +00:00

scoped-relaxation.s

[MC] Rename temporary symbols of empty name to ".L0 " (#89693)

2024-04-26 08:30:27 -07:00

smctr-ssctr-valid.s

[RISCV] Remove experimental from Smctr and Ssctr. (#153903)

2025-08-15 17:18:09 -07:00

smrnmi-invalid.s

[RISCV] Add Smrnmi extension (#111668)

2024-10-25 18:41:21 +11:00

smrnmi-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

supervisor-csr-names.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

tail-call-invalid.s

RISCVAsmParser: Reject call foo@invalid

2025-04-13 11:07:25 -07:00

tail-call.s

[test] Remove CHECK lines for MCAsmStreamer's fixup output

2025-04-17 18:55:20 -07:00

target-abi-invalid.s

[RISCV] Just reporting an error shouldn't generate a crash diagnostic (#134040)

2025-04-15 08:52:00 -07:00

target-abi-valid.s

…

tlsdesc.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

twice.ll

…

user-csr-names.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

vendor-symbol.s

[RISCV] Add symbol parsing support for XAndesPerf branch instructions (#137748)

2025-06-20 09:06:57 +08:00

xandesperf-fixups-diagnostics.s

MCFixup: Improve location accuracy and remove MCFixup::Loc

2025-07-04 12:06:28 -07:00

xandesperf-invalid.s

[RISCV] Add Andes XAndesperf (Andes Performance) extension. (#135110)

2025-04-28 17:23:51 +08:00

xandesperf-relocation.s

[RISCV] Add symbol parsing support for XAndesPerf branch instructions (#137748)

2025-06-20 09:06:57 +08:00

xandesperf-rv64-invalid.s

[RISCV] Add Andes XAndesperf (Andes Performance) extension. (#135110)

2025-04-28 17:23:51 +08:00

xandesperf-rv64-valid.s

[RISCV] Add Andes XAndesperf (Andes Performance) extension. (#135110)

2025-04-28 17:23:51 +08:00

xandesperf-valid.s

[RISCV] Add Andes XAndesperf (Andes Performance) extension. (#135110)

2025-04-28 17:23:51 +08:00

xandesvbfhcvt-valid.s

[RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion) extension (#144320)

2025-06-18 09:17:46 +08:00

xandesvdot-valid.s

[RISCV] Add Andes XAndesVDot (Andes Vector Dot Product) extension. (#139849)

2025-05-15 10:14:58 +08:00

xandesvpackfph-valid.s

[RISCV] Add Andes XAndesVPackFPH (Andes Vector Packed FP16) extension. (#138827)

2025-05-12 16:58:39 +08:00

xandesvsintload-valid.s

[RISCV] Add Andes XAndesVSIntLoad (Andes Vector INT4 Load) extension (#147005)

2025-07-07 13:01:22 +08:00

xmips-invalid.s

[RISCV] Added the MIPS prefetch extensions for MIPS RV64 P8700. (#145647)

2025-07-03 10:59:10 +02:00

xmips-valid.s

[RISCV] Added the MIPS prefetch extensions for MIPS RV64 P8700. (#145647)

2025-07-03 10:59:10 +02:00

xqci-fixups.s

[RISCV] Fix QC.E.LI -> C.LI with Bare Symbol Compression (#146763)

2025-07-14 21:00:38 -07:00

xqcia-invalid.s

[RISCV] Xqcia 0.4 The spec was recently updated, this changes the name in the TD files associated and increments the Extension number in the clang driver. This is mostly a MC change as there is no other generated code for these instructions yet.

2025-02-26 08:09:20 -05:00

xqcia-valid.s

[RISCV] Xqcia 0.4 The spec was recently updated, this changes the name in the TD files associated and increments the Extension number in the clang driver. This is mostly a MC change as there is no other generated code for these instructions yet.

2025-02-26 08:09:20 -05:00

xqciac-invalid.s

RISCVAsmParser: Replace "modifier" with "specifier" in diagnostics

2025-03-23 15:12:27 -07:00

xqciac-valid.s

[RISCV] Add support for handling one tied operand in the source instruction for compress patterns (#143660)

2025-06-19 12:36:20 +05:30

xqcibi-invalid.s

[RISCV] Add Qualcomm uC Xqcibi (Branch Immediate) extension (#130779)

2025-03-18 15:18:43 +05:30

xqcibi-linker-relaxation.s

[RISCV] Track Linker Relaxable through Assembly Relaxation (#152602)

2025-08-12 09:02:48 +01:00

xqcibi-long-conditional-jump.s

[RISCV] Add compress patterns for Xqcibi branch instructions (#143095)

2025-06-09 09:29:02 +05:30

xqcibi-relocations.s

[RISCV] Fix QC.E.LI -> C.LI with Bare Symbol Compression (#146763)

2025-07-14 21:00:38 -07:00

xqcibi-valid.s

[RISCV] Add compress patterns for Xqcibi branch instructions (#143095)

2025-06-09 09:29:02 +05:30

xqcibm-invalid.s

[RISCV] Modify register type of extd* Xqcibm instructions (#134027)

2025-04-02 12:14:50 +05:30

xqcibm-valid.s

[RISCV] Add compress patterns for qc.extu and qc.mvltui (#140682)

2025-05-23 14:20:31 +05:30

xqcicli-invalid.s

[RISCV] Improve Errors for GPRNoX0 Reg Class (#126397)

2025-02-10 17:21:51 -08:00

xqcicli-valid.s

[RISCV,test] Replace -riscv-no-aliases with -M no-aliases

2025-04-08 19:42:43 -07:00

xqcicm-invalid.s

[RISCV] Improve Errors for GPRNoX0 Reg Class (#126397)

2025-02-10 17:21:51 -08:00

xqcicm-valid.s

[RISCV] Add Tied operands in Xqcicm instructions and changes to handle a single tied operand in source DAG and instruction (#145538)

2025-06-25 10:25:00 +05:30

xqcics-invalid.s

[RISCV] Improve Errors for GPRNoX0 Reg Class (#126397)

2025-02-10 17:21:51 -08:00

xqcics-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

xqcicsr-invalid.s

[RISCV] Improve Errors for GPRNoX0 Reg Class (#126397)

2025-02-10 17:21:51 -08:00

xqcicsr-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

xqciint-csrs-invalid.s

[RISCV] Xqciint SystemRegs, Final Assembly Insts (#130867)

2025-03-23 12:04:06 -07:00

xqciint-csrs-valid.s

[RISCV,test] Replace -riscv-no-aliases with -M no-aliases

2025-04-08 19:42:43 -07:00

xqciint-invalid.s

[RISCV] Xqciint SystemRegs, Final Assembly Insts (#130867)

2025-03-23 12:04:06 -07:00

xqciint-valid.s

[RISCV,test] Replace -riscv-no-aliases with -M no-aliases

2025-04-08 19:42:43 -07:00

xqciio-aliases-valid.s

[RISCV,test] Replace -riscv-no-aliases with -M no-aliases

2025-04-08 19:42:43 -07:00

xqciio-invalid.s

[RISCV] Add Qualcomm uC Xqciio (External Input Output) extension (#132721)

2025-03-28 19:47:29 -07:00

xqciio-valid.s

[RISCV,test] Replace -riscv-no-aliases with -M no-aliases

2025-04-08 19:42:43 -07:00

xqcilb-invalid.s

[RISCV] Xqcilb: remove RISCVMCExpr::VK_QC_E_JUMP_PLT and drop @plt parsing

2025-04-15 09:10:04 -07:00

xqcilb-relocations.s

[RISCV] Fix QC.E.LI -> C.LI with Bare Symbol Compression (#146763)

2025-07-14 21:00:38 -07:00

xqcilb-valid.s

[RISCV] Add compress patterns for QC_E_J/JAL and QC_E_LI (#141561)

2025-05-28 10:29:36 +05:30

xqcili-invalid.s

[RISCV] Add symbol parsing support for Xqcili load large immediate instructions (#134581)

2025-04-08 22:56:26 -07:00

xqcili-li.s

[RISCV,test] Replace -riscv-no-aliases with -M no-aliases

2025-04-08 19:42:43 -07:00

xqcili-relocations.s

[RISCV] Fix QC.E.LI -> C.LI with Bare Symbol Compression (#146763)

2025-07-14 21:00:38 -07:00

xqcili-valid.s

[RISCV] Add compress patterns for QC_E_J/JAL and QC_E_LI (#141561)

2025-05-28 10:29:36 +05:30

xqcilia-invalid.s

[RISCV] Add Qualcomm uC Xqcilia (Large Immediate Arithmetic) extension (#124706)

2025-02-24 08:04:29 -08:00

xqcilia-valid.s

[RISCV] Relax destination instruction dag operand matching in CompresInstEmitter (#148660)

2025-07-15 04:52:51 +05:30

xqcilo-aliases-valid.s

[RISCV] Add compress patterns for Xqcilo load/store instructions (#137758)

2025-04-30 14:29:49 +05:30

xqcilo-invalid.s

[RISCV] Add Qualcomm uC Xqcilo (Large Offset Load Store) extension (#123881)

2025-01-23 10:14:25 +05:30

xqcilo-pseudos-invalid.s

[RISCV][Xqcilo] Load/Store Pseudos (#134931)

2025-04-08 17:21:56 -07:00

xqcilo-pseudos-valid.s

[RISCV][Xqcilo] Load/Store Pseudos (#134931)

2025-04-08 17:21:56 -07:00

xqcilo-valid.s

[RISCV] Add some more compress patterns for Xqcilo instructions (#138309)

2025-05-03 06:09:59 +05:30

xqcilsm-aliases-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

xqcilsm-invalid.s

[RISCV] Change input register type for QC_SWM and QC_SWMI (#144294)

2025-06-16 12:28:12 +05:30

xqcilsm-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

xqcisim-invalid.s

[RISCV] Add Qualcomm uC Xqcisim (Simulation Hint) extension (#128833)

2025-03-18 09:05:22 -07:00

xqcisim-valid.s

[RISCV] Use Hints for Xqcisim/Xqcisync Aliases (#151040)

2025-07-29 09:21:25 -07:00

xqcisls-invalid.s

[RISCV] Improve Errors for GPRNoX0 Reg Class (#126397)

2025-02-10 17:21:51 -08:00

xqcisls-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

xqcisync-invalid.s

Recommit "[RISCV] Add Qualcomm uC Xqcisync (Sync Delay) extension (#132184)" (#132520)

2025-03-22 11:07:48 +05:30

xqcisync-valid.s

[RISCV] Use Hints for Xqcisim/Xqcisync Aliases (#151040)

2025-07-29 09:21:25 -07:00

xrivosvisni-valid.s

[RISCV,test] Replace -riscv-no-aliases with -M no-aliases

2025-04-08 19:42:43 -07:00

xrivosvizip-invalid.s

[RISCV] Change the vendor prefix for Rivos from "rv." to "ri." (#128761)

2025-02-25 11:27:18 -08:00

xrivosvizip-valid.s

[RISCV,test] Replace -riscv-no-aliases with -M no-aliases

2025-04-08 19:42:43 -07:00

xsfmclic-invalid.s

[RISCV] SiFive CLIC Support (#132481)

2025-04-25 17:12:27 -07:00

xsfmclic-valid.s

[RISCV] SiFive CLIC Support (#132481)

2025-04-25 17:12:27 -07:00

xsfsclic-invalid.s

[RISCV] SiFive CLIC Support (#132481)

2025-04-25 17:12:27 -07:00

xsfsclic-valid.s

[RISCV] SiFive CLIC Support (#132481)

2025-04-25 17:12:27 -07:00

xsifive-invalid.s

[RISCV] Add back SiFive's cdiscard.d.l1, cflush.d.l1, and cease instructions. (#83896)

2024-03-13 14:56:25 -07:00

xsifive-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

xsmtvdot-invalid.s

[RISCV][NFC] Ensure files end with newline. (#154457)

2025-08-20 17:18:16 +08:00

xsmtvdot-valid.s

[RISCV][NFC] Ensure files end with newline. (#154457)

2025-08-20 17:18:16 +08:00

XTHeadBa-invalid.s

…

XTHeadBa-valid.s

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

xtheadcmo-invalid.s

…

xtheadcmo-valid.s

…

xtheadcondmov-invalid.s

…

xtheadcondmov-valid.s

…

xtheadmac-invalid.s

…

xtheadsync-invalid.s

…

xtheadsync-valid.s

…

XTHeadVdot-valid.s

[RISCV] Add capital letters to T-Head extension names in descriptions. (#99070)

2024-07-16 15:33:27 -07:00

XVentanaCondOps-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

xwchc-compress.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

xwchc-invalid.s

[RISCV] Improve Errors for GPRNoX0X2/SP Reg Classes (#126394)

2025-02-10 09:07:51 -08:00

xwchc-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

Zawrs-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

zfa-double-invalid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

zfa-half-invalid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

zfa-invalid.s

[RISCV][MC] Add Q support for Zfa (#139508)

2025-05-15 10:54:16 +08:00

zfa-quad-invalid.s

[RISCV][MC] Add Q support for Zfa (#139508)

2025-05-15 10:54:16 +08:00

zfa-valid.s

[RISCV][MC] Add Q support for Zfa (#139508)

2025-05-15 10:54:16 +08:00

zfa-zfhmin-zvfh-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

zicfilp-invalid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

zicfilp-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

zicfiss-invalid.s

[RISCV] Improve Errors for GPRNoX0 Reg Class (#126397)

2025-02-10 17:21:51 -08:00

zicfiss-valid.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00

Ztso.s

[test] Replace -riscv-no-alises with -M no-aliases

2024-12-24 13:53:26 -08:00