a027eb4472
Implements https://github.com/llvm/wg-hlsl/blob/main/proposals/0026-symbol-visibility.md. The change is to stop using the `hlsl.export` attribute. Instead, symbols with "program linkage" in HLSL will have export linkage with default visibility, and symbols with "external linkage" in HLSL will have export linkage with hidden visibility.
40 lines
2.2 KiB
HLSL
40 lines
2.2 KiB
HLSL
// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.3-pixel %s -fnative-half-type -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -finclude-default-header -triple spirv-vulkan-pixel %s -fnative-half-type -emit-llvm -o - | FileCheck %s --check-prefix=SPIRV
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void test_scalar(float Buf) {
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// CHECK: define hidden void @{{.*}}test_scalar{{.*}}(float {{.*}} [[VALP:%.*]])
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// CHECK: [[LOAD:%.*]] = load float, ptr [[VALP]].addr, align 4
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// CHECK-NEXT: [[FCMP:%.*]] = fcmp reassoc nnan ninf nsz arcp afn olt float [[LOAD]], 0.000000e+00
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// CHECK-NO: call i1 @llvm.dx.any
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// CHECK-NEXT: call void @llvm.dx.discard(i1 [[FCMP]])
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//
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// SPIRV: define hidden spir_func void @{{.*}}test_scalar{{.*}}(float {{.*}} [[VALP:%.*]])
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// SPIRV: [[LOAD:%.*]] = load float, ptr [[VALP]].addr, align 4
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// SPIRV-NEXT: [[FCMP:%.*]] = fcmp reassoc nnan ninf nsz arcp afn olt float [[LOAD]], 0.000000e+00
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// SPIRV-NO: call i1 @llvm.spv.any
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// SPIRV-NEXT: br i1 [[FCMP]], label %[[LTL:.*]], label %[[ENDL:.*]]
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// SPIRV: [[LTL]]: ; preds = %entry
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// SPIRV-NEXT: call void @llvm.spv.discard()
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// SPIRV: br label %[[ENDL]]
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clip(Buf);
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}
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void test_vector4(float4 Buf) {
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// CHECK: define hidden void @{{.*}}test_vector{{.*}}(<4 x float> {{.*}} [[VALP:%.*]])
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// CHECK: [[LOAD:%.*]] = load <4 x float>, ptr [[VALP]].addr, align 16
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// CHECK-NEXT: [[FCMP:%.*]] = fcmp reassoc nnan ninf nsz arcp afn olt <4 x float> [[LOAD]], zeroinitializer
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// CHECK-NEXT: [[ANYC:%.*]] = call i1 @llvm.dx.any.v4i1(<4 x i1> [[FCMP]])
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// CHECK-NEXT: call void @llvm.dx.discard(i1 [[ANYC]])
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//
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// SPIRV: define hidden spir_func void @{{.*}}test_vector{{.*}}(<4 x float> {{.*}} [[VALP:%.*]])
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// SPIRV: [[LOAD:%.*]] = load <4 x float>, ptr [[VALP]].addr, align 16
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// SPIRV-NEXT: [[FCMP:%.*]] = fcmp reassoc nnan ninf nsz arcp afn olt <4 x float> [[LOAD]], zeroinitializer
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// SPIRV-NEXT: [[ANYC:%.*]] = call i1 @llvm.spv.any.v4i1(<4 x i1> [[FCMP]])
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// SPIRV-NEXT: br i1 [[ANYC]], label %[[LTL:.*]], label %[[ENDL:.*]]
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// SPIRV: [[LTL]]: ; preds = %entry
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// SPIRV-NEXT: call void @llvm.spv.discard()
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// SPIRV-NEXT: br label %[[ENDL]]
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clip(Buf);
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}
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