a027eb4472
Implements https://github.com/llvm/wg-hlsl/blob/main/proposals/0026-symbol-visibility.md. The change is to stop using the `hlsl.export` attribute. Instead, symbols with "program linkage" in HLSL will have export linkage with default visibility, and symbols with "external linkage" in HLSL will have export linkage with hidden visibility.
92 lines
4.8 KiB
HLSL
92 lines
4.8 KiB
HLSL
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm -O1 -o - | FileCheck %s
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// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple spirv-vulkan-library %s -fnative-half-type -emit-llvm -O0 -o - | FileCheck %s --check-prefix=SPIRV
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// CHECK: define {{.*}} i32 {{.*}}test_scalar{{.*}}(double {{.*}} [[VALD:%.*]])
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// CHECK: [[VALRET:%.*]] = {{.*}} call { i32, i32 } @llvm.dx.splitdouble.i32(double [[VALD]])
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// CHECK-NEXT: extractvalue { i32, i32 } [[VALRET]], 0
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// CHECK-NEXT: extractvalue { i32, i32 } [[VALRET]], 1
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//
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// SPIRV: define hidden spir_func {{.*}} i32 {{.*}}test_scalar{{.*}}(double {{.*}} [[VALD:%.*]])
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// SPIRV-NOT: @llvm.dx.splitdouble.i32
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// SPIRV: [[LOAD:%.*]] = load double, ptr [[VALD]].addr, align 8
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// SPIRV-NEXT: [[CAST:%.*]] = bitcast double [[LOAD]] to <2 x i32>
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// SPIRV-NEXT: extractelement <2 x i32> [[CAST]], i64 0
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// SPIRV-NEXT: extractelement <2 x i32> [[CAST]], i64 1
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uint test_scalar(double D) {
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uint A, B;
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asuint(D, A, B);
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return A + B;
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}
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// CHECK: define {{.*}} <1 x i32> {{.*}}test_double1{{.*}}(<1 x double> {{.*}} [[VALD:%.*]])
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// CHECK: [[TRUNC:%.*]] = extractelement <1 x double> %D, i64 0
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// CHECK-NEXT: [[VALRET:%.*]] = {{.*}} call { i32, i32 } @llvm.dx.splitdouble.i32(double [[TRUNC]])
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// CHECK-NEXT: extractvalue { i32, i32 } [[VALRET]], 0
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// CHECK-NEXT: extractvalue { i32, i32 } [[VALRET]], 1
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//
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// SPIRV: define hidden spir_func {{.*}} <1 x i32> {{.*}}test_double1{{.*}}(<1 x double> {{.*}} [[VALD:%.*]])
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// SPIRV-NOT: @llvm.dx.splitdouble.i32
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// SPIRV: [[LOAD:%.*]] = load <1 x double>, ptr [[VALD]].addr, align 8
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// SPIRV-NEXT: [[TRUNC:%.*]] = extractelement <1 x double> [[LOAD]], i64 0
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// SPIRV-NEXT: [[CAST:%.*]] = bitcast double [[TRUNC]] to <2 x i32>
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// SPIRV-NEXT: extractelement <2 x i32> [[CAST]], i64 0
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// SPIRV-NEXT: extractelement <2 x i32> [[CAST]], i64 1
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uint1 test_double1(double1 D) {
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uint A, B;
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asuint(D, A, B);
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return A + B;
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}
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// CHECK: define {{.*}} <2 x i32> {{.*}}test_vector2{{.*}}(<2 x double> {{.*}} [[VALD:%.*]])
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// CHECK: [[VALRET:%.*]] = {{.*}} call { <2 x i32>, <2 x i32> } @llvm.dx.splitdouble.v2i32(<2 x double> [[VALD]])
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// CHECK-NEXT: extractvalue { <2 x i32>, <2 x i32> } [[VALRET]], 0
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// CHECK-NEXT: extractvalue { <2 x i32>, <2 x i32> } [[VALRET]], 1
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//
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// SPIRV: define hidden spir_func {{.*}} <2 x i32> {{.*}}test_vector2{{.*}}(<2 x double> {{.*}} [[VALD:%.*]])
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// SPIRV-NOT: @llvm.dx.splitdouble.i32
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// SPIRV: [[LOAD:%.*]] = load <2 x double>, ptr [[VALD]].addr, align 16
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// SPIRV-NEXT: [[CAST1:%.*]] = bitcast <2 x double> [[LOAD]] to <4 x i32>
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// SPIRV-NEXT: [[SHUF1:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> poison, <2 x i32> <i32 0, i32 2>
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// SPIRV-NEXT: [[SHUF2:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> poison, <2 x i32> <i32 1, i32 3>
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uint2 test_vector2(double2 D) {
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uint2 A, B;
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asuint(D, A, B);
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return A + B;
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}
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// CHECK: define {{.*}} <3 x i32> {{.*}}test_vector3{{.*}}(<3 x double> {{.*}} [[VALD:%.*]])
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// CHECK: [[VALRET:%.*]] = {{.*}} call { <3 x i32>, <3 x i32> } @llvm.dx.splitdouble.v3i32(<3 x double> [[VALD]])
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// CHECK-NEXT: extractvalue { <3 x i32>, <3 x i32> } [[VALRET]], 0
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// CHECK-NEXT: extractvalue { <3 x i32>, <3 x i32> } [[VALRET]], 1
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//
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// SPIRV: define hidden spir_func {{.*}} <3 x i32> {{.*}}test_vector3{{.*}}(<3 x double> {{.*}} [[VALD:%.*]])
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// SPIRV-NOT: @llvm.dx.splitdouble.i32
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// SPIRV: [[LOAD:%.*]] = load <3 x double>, ptr [[VALD]].addr, align 32
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// SPIRV-NEXT: [[CAST1:%.*]] = bitcast <3 x double> [[LOAD]] to <6 x i32>
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// SPIRV-NEXT: [[SHUF1:%.*]] = shufflevector <6 x i32> [[CAST1]], <6 x i32> poison, <3 x i32> <i32 0, i32 2, i32 4>
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// SPIRV-NEXT: [[SHUF2:%.*]] = shufflevector <6 x i32> [[CAST1]], <6 x i32> poison, <3 x i32> <i32 1, i32 3, i32 5>
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uint3 test_vector3(double3 D) {
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uint3 A, B;
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asuint(D, A, B);
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return A + B;
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}
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// CHECK: define {{.*}} <4 x i32> {{.*}}test_vector4{{.*}}(<4 x double> {{.*}} [[VALD:%.*]])
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// CHECK: [[VALRET:%.*]] = {{.*}} call { <4 x i32>, <4 x i32> } @llvm.dx.splitdouble.v4i32(<4 x double> [[VALD]])
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// CHECK-NEXT: extractvalue { <4 x i32>, <4 x i32> } [[VALRET]], 0
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// CHECK-NEXT: extractvalue { <4 x i32>, <4 x i32> } [[VALRET]], 1
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//
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// SPIRV: define hidden spir_func {{.*}} <4 x i32> {{.*}}test_vector4{{.*}}(<4 x double> {{.*}} [[VALD:%.*]])
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// SPIRV-NOT: @llvm.dx.splitdouble.i32
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// SPIRV: [[LOAD:%.*]] = load <4 x double>, ptr [[VALD]].addr, align 32
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// SPIRV-NEXT: [[CAST1:%.*]] = bitcast <4 x double> [[LOAD]] to <8 x i32>
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// SPIRV-NEXT: [[SHUF1:%.*]] = shufflevector <8 x i32> [[CAST1]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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// SPIRV-NEXT: [[SHUF2:%.*]] = shufflevector <8 x i32> [[CAST1]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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uint4 test_vector4(double4 D) {
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uint4 A, B;
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asuint(D, A, B);
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return A + B;
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}
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