43 lines
1.6 KiB
LLVM
43 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=amdgcn -mcpu=tahiti -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefix=GCN %s
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; This used to crash because during intermediate control flow lowering, there
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; was a sequence
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; s_mov_b64 s[0:1], exec
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; s_and_b64 s[2:3], s[0:1], s[2:3] ; def & use of the same register pair
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; ...
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; s_mov_b64_term exec, s[2:3]
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; that was not treated correctly.
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;
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define amdgpu_ps void @ham(float %arg, float %arg1) #0 {
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; GCN-LABEL: ham:
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; GCN: ; %bb.0: ; %bb
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; GCN-NEXT: v_cmp_lt_f32_e32 vcc, 0, v0
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; GCN-NEXT: v_cmp_lt_f32_e64 s[0:1], 0, v1
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; GCN-NEXT: s_and_b64 s[0:1], vcc, s[0:1]
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; GCN-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]
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; GCN-NEXT: ; %bb.1: ; %bb4
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; GCN-NEXT: v_mov_b32_e32 v0, 4
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; GCN-NEXT: s_mov_b32 m0, -1
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; GCN-NEXT: ds_write_b32 v0, v0
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; GCN-NEXT: ; divergent unreachable
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; GCN-NEXT: ; %bb.2: ; %UnifiedReturnBlock
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; GCN-NEXT: s_endpgm
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bb:
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%tmp = fcmp ogt float %arg, 0.000000e+00
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%tmp2 = fcmp ogt float %arg1, 0.000000e+00
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%tmp3 = and i1 %tmp, %tmp2
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br i1 %tmp3, label %bb4, label %bb5
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bb4: ; preds = %bb
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store volatile i32 4, ptr addrspace(3) poison
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unreachable
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bb5: ; preds = %bb
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ret void
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}
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attributes #0 = { nounwind readonly "InitialPSInputAddr"="36983" }
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attributes #1 = { nounwind readnone }
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