7b36502854
It is likley that subtargets act differently for a vector load store instructions based on the LMUL. This patch creates seperate SchedRead, SchedWrite, WriteRes, ReadAdvance for each relevant LMUL. Differential Revision: https://reviews.llvm.org/D137429
926 lines
37 KiB
TableGen
926 lines
37 KiB
TableGen
//===-- RISCVScheduleV.td - RISCV Scheduling Definitions V -*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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/// Define scheduler resources associated with def operands.
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defvar UpperBoundLMUL = "UpperBound";
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defvar SchedMxList = ["UpperBound", "M1", "M2", "M4", "M8", "MF2", "MF4", "MF8"];
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// Used for widening and narrowing instructions as it doesn't contain M8.
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defvar SchedMxListW = ["UpperBound", "MF8", "MF4", "MF2", "M1", "M2", "M4"];
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defvar SchedMxListFW = ["UpperBound", "MF4", "MF2", "M1", "M2", "M4"];
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// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxList
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multiclass LMULSchedWrites<string name> {
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foreach mx = SchedMxList in {
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def name # "_" # mx : SchedWrite;
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}
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}
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// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxListW
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multiclass LMULSchedWritesW<string name> {
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foreach mx = SchedMxListW in {
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def name # "_" # mx : SchedWrite;
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}
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}
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// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxListFW
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multiclass LMULSchedWritesFW<string name> {
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foreach mx = SchedMxListFW in {
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def name # "_" # mx : SchedWrite;
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}
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}
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// Creates SchedRead for each (name, LMUL) pair for LMUL in SchedMxList
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multiclass LMULSchedReads<string name> {
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foreach mx = SchedMxList in {
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def name # "_" # mx : SchedRead;
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}
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}
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// Creates SchedRead for each (name, LMUL) pair for LMUL in SchedMxListW
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multiclass LMULSchedReadsW<string name> {
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foreach mx = SchedMxListW in {
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def name # "_" # mx : SchedRead;
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}
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}
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// Creates SchedRead for each (name, LMUL) pair for LMUL in SchedMxListFW
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multiclass LMULSchedReadsFW<string name> {
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foreach mx = SchedMxListFW in {
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def name # "_" # mx : SchedRead;
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}
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}
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// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
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// in SchedMxList
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multiclass LMULWriteRes<string name, list<ProcResourceKind> resources> {
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foreach mx = SchedMxList in {
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def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
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}
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}
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// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
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// in SchedMxListW
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multiclass LMULWriteResW<string name, list<ProcResourceKind> resources> {
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foreach mx = SchedMxListW in {
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def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
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}
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}
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// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
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// in SchedMxListFW
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multiclass LMULWriteResFW<string name, list<ProcResourceKind> resources> {
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foreach mx = SchedMxListFW in {
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def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
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}
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}
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// Creates ReadAdvance for each (name, LMUL, val) tuple for LMUL
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// in SchedMxList
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multiclass LMULReadAdvance<string name, int val, list<SchedWrite> writes = []> {
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foreach mx = SchedMxList in {
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def : ReadAdvance<!cast<SchedRead>(name # "_" # mx), val, writes>;
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}
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}
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// Creates ReadAdvance for each (name, LMUL, val) tuple for LMUL
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// in SchedMxListW
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multiclass LMULReadAdvanceW<string name, int val, list<SchedWrite> writes = []> {
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foreach mx = SchedMxListW in {
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def : ReadAdvance<!cast<SchedRead>(name # "_" # mx), val, writes>;
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}
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}
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// Creates ReadAdvance for each (name, LMUL, val) tuple for LMUL
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// in SchedMxListFW
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multiclass LMULReadAdvanceFW<string name, int val, list<SchedWrite> writes = []> {
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foreach mx = SchedMxListFW in {
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def : ReadAdvance<!cast<SchedRead>(name # "_" # mx), val, writes>;
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}
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}
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// 3.6 Vector Byte Length vlenb
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def WriteRdVLENB : SchedWrite;
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// 6. Configuration-Setting Instructions
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def WriteVSETVLI : SchedWrite;
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def WriteVSETIVLI : SchedWrite;
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def WriteVSETVL : SchedWrite;
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// 7. Vector Loads and Stores
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// 7.4. Vector Unit-Stride Instructions
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defm "" : LMULSchedWrites<"WriteVLDE">;
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defm "" : LMULSchedWrites<"WriteVSTE">;
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// 7.4.1. Vector Unit-Strided Mask
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defm "" : LMULSchedWrites<"WriteVLDM">;
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defm "" : LMULSchedWrites<"WriteVSTM">;
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// 7.5. Vector Strided Instructions
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defm "" : LMULSchedWrites<"WriteVLDS8">;
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defm "" : LMULSchedWrites<"WriteVLDS16">;
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defm "" : LMULSchedWrites<"WriteVLDS32">;
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defm "" : LMULSchedWrites<"WriteVLDS64">;
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defm "" : LMULSchedWrites<"WriteVSTS8">;
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defm "" : LMULSchedWrites<"WriteVSTS16">;
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defm "" : LMULSchedWrites<"WriteVSTS32">;
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defm "" : LMULSchedWrites<"WriteVSTS64">;
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// 7.6. Vector Indexed Instructions
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defm "" : LMULSchedWrites<"WriteVLDUX8">;
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defm "" : LMULSchedWrites<"WriteVLDUX16">;
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defm "" : LMULSchedWrites<"WriteVLDUX32">;
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defm "" : LMULSchedWrites<"WriteVLDUX64">;
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defm "" : LMULSchedWrites<"WriteVLDOX8">;
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defm "" : LMULSchedWrites<"WriteVLDOX16">;
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defm "" : LMULSchedWrites<"WriteVLDOX32">;
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defm "" : LMULSchedWrites<"WriteVLDOX64">;
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defm "" : LMULSchedWrites<"WriteVSTUX8">;
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defm "" : LMULSchedWrites<"WriteVSTUX16">;
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defm "" : LMULSchedWrites<"WriteVSTUX32">;
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defm "" : LMULSchedWrites<"WriteVSTUX64">;
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defm "" : LMULSchedWrites<"WriteVSTOX8">;
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defm "" : LMULSchedWrites<"WriteVSTOX16">;
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defm "" : LMULSchedWrites<"WriteVSTOX32">;
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defm "" : LMULSchedWrites<"WriteVSTOX64">;
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// 7.7. Vector Unit-stride Fault-Only-First Loads
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defm "" : LMULSchedWrites<"WriteVLDFF">;
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// 7.8. Vector Segment Instructions
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foreach nf=2-8 in {
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foreach eew = [8, 16, 32, 64] in {
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defm "" : LMULSchedWrites<"WriteVLSEG" # nf # e # eew>;
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defm "" : LMULSchedWrites<"WriteVSSEG" # nf # e # eew>;
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defm "" : LMULSchedWrites<"WriteVLSEGFF" # nf # e # eew>;
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defm "" : LMULSchedWrites<"WriteVLSSEG" # nf # e # eew>;
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defm "" : LMULSchedWrites<"WriteVSSSEG" # nf # e # eew>;
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defm "" : LMULSchedWrites<"WriteVLUXSEG" # nf # e # eew>;
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defm "" : LMULSchedWrites<"WriteVLOXSEG" # nf # e # eew>;
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defm "" : LMULSchedWrites<"WriteVSUXSEG" # nf # e # eew>;
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defm "" : LMULSchedWrites<"WriteVSOXSEG" # nf # e # eew>;
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}
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}
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// 7.9. Vector Whole Register Instructions
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def WriteVLD1R : SchedWrite;
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def WriteVLD2R : SchedWrite;
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def WriteVLD4R : SchedWrite;
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def WriteVLD8R : SchedWrite;
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def WriteVST1R : SchedWrite;
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def WriteVST2R : SchedWrite;
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def WriteVST4R : SchedWrite;
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def WriteVST8R : SchedWrite;
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// 11. Vector Integer Arithmetic Instructions
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// 11.1. Vector Single-Width Integer Add and Subtract
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// 11.5. Vector Bitwise Logical Instructions
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defm "" : LMULSchedWrites<"WriteVIALUV">;
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defm "" : LMULSchedWrites<"WriteVIALUX">;
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defm "" : LMULSchedWrites<"WriteVIALUI">;
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// 11.2. Vector Widening Integer Add/Subtract
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defm "" : LMULSchedWritesW<"WriteVIWALUV">;
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defm "" : LMULSchedWritesW<"WriteVIWALUX">;
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defm "" : LMULSchedWritesW<"WriteVIWALUI">;
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// 11.3. Vector Integer Extension
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defm "" : LMULSchedWrites<"WriteVExtV">;
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// 11.4. Vector Integer Arithmetic with Carry or Borrow Instructions
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defm "" : LMULSchedWrites<"WriteVICALUV">;
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defm "" : LMULSchedWrites<"WriteVICALUX">;
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defm "" : LMULSchedWrites<"WriteVICALUI">;
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// 11.6. Vector Single-Width Bit Shift Instructions
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defm "" : LMULSchedWrites<"WriteVShiftV">;
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defm "" : LMULSchedWrites<"WriteVShiftX">;
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defm "" : LMULSchedWrites<"WriteVShiftI">;
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// 11.7. Vector Narrowing Integer Right Shift Instructions
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defm "" : LMULSchedWritesW<"WriteVNShiftV">;
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defm "" : LMULSchedWritesW<"WriteVNShiftX">;
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defm "" : LMULSchedWritesW<"WriteVNShiftI">;
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// 11.8. Vector Integer Comparison Instructions
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// 11.9. Vector Integer Min/Max Instructions
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defm "" : LMULSchedWrites<"WriteVICmpV">;
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defm "" : LMULSchedWrites<"WriteVICmpX">;
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defm "" : LMULSchedWrites<"WriteVICmpI">;
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// 11.10. Vector Single-Width Integer Multiply Instructions
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defm "" : LMULSchedWrites<"WriteVIMulV">;
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defm "" : LMULSchedWrites<"WriteVIMulX">;
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// 11.11. Vector Integer Divide Instructions
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defm "" : LMULSchedWrites<"WriteVIDivV">;
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defm "" : LMULSchedWrites<"WriteVIDivX">;
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// 11.12. Vector Widening Integer Multiply Instructions
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defm "" : LMULSchedWritesW<"WriteVIWMulV">;
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defm "" : LMULSchedWritesW<"WriteVIWMulX">;
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// 11.13. Vector Single-Width Integer Multiply-Add Instructions
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defm "" : LMULSchedWrites<"WriteVIMulAddV">;
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defm "" : LMULSchedWrites<"WriteVIMulAddX">;
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// 11.14. Vector Widening Integer Multiply-Add Instructions
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defm "" : LMULSchedWritesW<"WriteVIWMulAddV">;
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defm "" : LMULSchedWritesW<"WriteVIWMulAddX">;
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// 11.15. Vector Integer Merge Instructions
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defm "" : LMULSchedWrites<"WriteVIMergeV">;
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defm "" : LMULSchedWrites<"WriteVIMergeX">;
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defm "" : LMULSchedWrites<"WriteVIMergeI">;
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// 11.16. Vector Integer Move Instructions
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defm "" : LMULSchedWrites<"WriteVIMovV">;
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defm "" : LMULSchedWrites<"WriteVIMovX">;
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defm "" : LMULSchedWrites<"WriteVIMovI">;
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// 12. Vector Fixed-Point Arithmetic Instructions
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// 12.1. Vector Single-Width Saturating Add and Subtract
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defm "" : LMULSchedWrites<"WriteVSALUV">;
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defm "" : LMULSchedWrites<"WriteVSALUX">;
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defm "" : LMULSchedWrites<"WriteVSALUI">;
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// 12.2. Vector Single-Width Averaging Add and Subtract
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defm "" : LMULSchedWrites<"WriteVAALUV">;
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defm "" : LMULSchedWrites<"WriteVAALUX">;
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// 12.3. Vector Single-Width Fractional Multiply with Rounding and Saturation
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defm "" : LMULSchedWrites<"WriteVSMulV">;
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defm "" : LMULSchedWrites<"WriteVSMulX">;
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// 12.4. Vector Single-Width Scaling Shift Instructions
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defm "" : LMULSchedWrites<"WriteVSShiftV">;
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defm "" : LMULSchedWrites<"WriteVSShiftX">;
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defm "" : LMULSchedWrites<"WriteVSShiftI">;
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// 12.5. Vector Narrowing Fixed-Point Clip Instructions
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defm "" : LMULSchedWritesW<"WriteVNClipV">;
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defm "" : LMULSchedWritesW<"WriteVNClipX">;
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defm "" : LMULSchedWritesW<"WriteVNClipI">;
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// 13. Vector Floating-Point Instructions
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// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
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defm "" : LMULSchedWrites<"WriteVFALUV">;
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defm "" : LMULSchedWrites<"WriteVFALUF">;
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// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
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defm "" : LMULSchedWritesFW<"WriteVFWALUV">;
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defm "" : LMULSchedWritesFW<"WriteVFWALUF">;
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// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
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defm "" : LMULSchedWrites<"WriteVFMulV">;
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defm "" : LMULSchedWrites<"WriteVFMulF">;
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defm "" : LMULSchedWrites<"WriteVFDivV">;
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defm "" : LMULSchedWrites<"WriteVFDivF">;
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// 13.5. Vector Widening Floating-Point Multiply
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defm "" : LMULSchedWritesFW<"WriteVFWMulV">;
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defm "" : LMULSchedWritesFW<"WriteVFWMulF">;
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// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
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defm "" : LMULSchedWrites<"WriteVFMulAddV">;
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defm "" : LMULSchedWrites<"WriteVFMulAddF">;
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// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
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defm "" : LMULSchedWritesFW<"WriteVFWMulAddV">;
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defm "" : LMULSchedWritesFW<"WriteVFWMulAddF">;
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// 13.8. Vector Floating-Point Square-Root Instruction
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defm "" : LMULSchedWrites<"WriteVFSqrtV">;
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// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
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// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
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defm "" : LMULSchedWrites<"WriteVFRecpV">;
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// 13.11. Vector Floating-Point MIN/MAX Instructions
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// 13.13. Vector Floating-Point Compare Instructions
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defm "" : LMULSchedWrites<"WriteVFCmpV">;
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defm "" : LMULSchedWrites<"WriteVFCmpF">;
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// 13.12. Vector Floating-Point Sign-Injection Instructions
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defm "" : LMULSchedWrites<"WriteVFSgnjV">;
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defm "" : LMULSchedWrites<"WriteVFSgnjF">;
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// 13.14. Vector Floating-Point Classify Instruction
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defm "" : LMULSchedWrites<"WriteVFClassV">;
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// 13.15. Vector Floating-Point Merge Instruction
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defm "" : LMULSchedWrites<"WriteVFMergeV">;
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// 13.16. Vector Floating-Point Move Instruction
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defm "" : LMULSchedWrites<"WriteVFMovV">;
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// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
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defm "" : LMULSchedWrites<"WriteVFCvtIToFV">;
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defm "" : LMULSchedWrites<"WriteVFCvtFToIV">;
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// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
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defm "" : LMULSchedWritesW<"WriteVFWCvtIToFV">;
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defm "" : LMULSchedWritesFW<"WriteVFWCvtFToIV">;
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defm "" : LMULSchedWritesFW<"WriteVFWCvtFToFV">;
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// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
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defm "" : LMULSchedWritesFW<"WriteVFNCvtIToFV">;
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defm "" : LMULSchedWritesW<"WriteVFNCvtFToIV">;
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defm "" : LMULSchedWritesFW<"WriteVFNCvtFToFV">;
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// 14. Vector Reduction Operations
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// 14.1. Vector Single-Width Integer Reduction Instructions
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def WriteVIRedV : SchedWrite;
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// 14.2. Vector Widening Integer Reduction Instructions
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def WriteVIWRedV : SchedWrite;
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// 14.3. Vector Single-Width Floating-Point Reduction Instructions
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def WriteVFRedV : SchedWrite;
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def WriteVFRedOV : SchedWrite;
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// 14.4. Vector Widening Floating-Point Reduction Instructions
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def WriteVFWRedV : SchedWrite;
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def WriteVFWRedOV : SchedWrite;
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// 15. Vector Mask Instructions
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// 15.1. Vector Mask-Register Logical Instructions
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defm "" : LMULSchedWrites<"WriteVMALUV">;
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// 15.2. Vector Mask Population Count
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defm "" : LMULSchedWrites<"WriteVMPopV">;
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// 15.3. Vector Find-First-Set Mask Bit
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defm "" : LMULSchedWrites<"WriteVMFFSV">;
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// 15.4. Vector Set-Before-First Mask Bit
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// 15.5. Vector Set-Including-First Mask Bit
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// 15.6. Vector Set-only-First Mask Bit
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defm "" : LMULSchedWrites<"WriteVMSFSV">;
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// 15.8. Vector Iota Instruction
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defm "" : LMULSchedWrites<"WriteVMIotV">;
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// 15.9. Vector Element Index Instruction
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defm "" : LMULSchedWrites<"WriteVMIdxV">;
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// 16. Vector Permutation Instructions
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// 16.1. Integer Scalar Move Instructions
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defm "" : LMULSchedWrites<"WriteVIMovVX">;
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defm "" : LMULSchedWrites<"WriteVIMovXV">;
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// 16.2. Floating-Point Scalar Move Instructions
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defm "" : LMULSchedWrites<"WriteVFMovVF">;
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defm "" : LMULSchedWrites<"WriteVFMovFV">;
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// 16.3. Vector Slide Instructions
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defm "" : LMULSchedWrites<"WriteVISlideX">;
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defm "" : LMULSchedWrites<"WriteVISlideI">;
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defm "" : LMULSchedWrites<"WriteVISlide1X">;
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defm "" : LMULSchedWrites<"WriteVFSlide1F">;
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// 16.4. Vector Register Gather Instructions
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defm "" : LMULSchedWrites<"WriteVGatherV">;
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defm "" : LMULSchedWrites<"WriteVGatherX">;
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defm "" : LMULSchedWrites<"WriteVGatherI">;
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// 16.5. Vector Compress Instruction
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defm "" : LMULSchedWrites<"WriteVCompressV">;
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// 16.6. Whole Vector Register Move
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// These are already LMUL aware
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def WriteVMov1V : SchedWrite;
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def WriteVMov2V : SchedWrite;
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def WriteVMov4V : SchedWrite;
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def WriteVMov8V : SchedWrite;
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//===----------------------------------------------------------------------===//
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/// Define scheduler resources associated with use operands.
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// 6. Configuration-Setting Instructions
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def ReadVSETVLI : SchedRead;
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def ReadVSETVL : SchedRead;
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// 7. Vector Loads and Stores
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defm "" : LMULSchedReads<"ReadVLDX">;
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defm "" : LMULSchedReads<"ReadVSTX">;
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// 7.4. Vector Unit-Stride Instructions
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defm "" : LMULSchedReads<"ReadVSTEV">;
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// 7.4.1. Vector Unit-Strided Mask
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defm "" : LMULSchedReads<"ReadVSTM">;
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// 7.5. Vector Strided Instructions
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defm "" : LMULSchedReads<"ReadVLDSX">;
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defm "" : LMULSchedReads<"ReadVSTSX">;
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defm "" : LMULSchedReads<"ReadVSTS8V">;
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defm "" : LMULSchedReads<"ReadVSTS16V">;
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defm "" : LMULSchedReads<"ReadVSTS32V">;
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defm "" : LMULSchedReads<"ReadVSTS64V">;
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// 7.6. Vector Indexed Instructions
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defm "" : LMULSchedReads<"ReadVLDUXV">;
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defm "" : LMULSchedReads<"ReadVLDOXV">;
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defm "" : LMULSchedReads<"ReadVSTUX8">;
|
|
defm "" : LMULSchedReads<"ReadVSTUX16">;
|
|
defm "" : LMULSchedReads<"ReadVSTUX32">;
|
|
defm "" : LMULSchedReads<"ReadVSTUX64">;
|
|
defm "" : LMULSchedReads<"ReadVSTUXV">;
|
|
defm "" : LMULSchedReads<"ReadVSTUX8V">;
|
|
defm "" : LMULSchedReads<"ReadVSTUX16V">;
|
|
defm "" : LMULSchedReads<"ReadVSTUX32V">;
|
|
defm "" : LMULSchedReads<"ReadVSTUX64V">;
|
|
defm "" : LMULSchedReads<"ReadVSTOX8">;
|
|
defm "" : LMULSchedReads<"ReadVSTOX16">;
|
|
defm "" : LMULSchedReads<"ReadVSTOX32">;
|
|
defm "" : LMULSchedReads<"ReadVSTOX64">;
|
|
defm "" : LMULSchedReads<"ReadVSTOXV">;
|
|
defm "" : LMULSchedReads<"ReadVSTOX8V">;
|
|
defm "" : LMULSchedReads<"ReadVSTOX16V">;
|
|
defm "" : LMULSchedReads<"ReadVSTOX32V">;
|
|
defm "" : LMULSchedReads<"ReadVSTOX64V">;
|
|
// 7.9. Vector Whole Register Instructions
|
|
// These are already LMUL aware
|
|
def ReadVST1R : SchedRead;
|
|
def ReadVST2R : SchedRead;
|
|
def ReadVST4R : SchedRead;
|
|
def ReadVST8R : SchedRead;
|
|
|
|
// 11. Vector Integer Arithmetic Instructions
|
|
// 11.1. Vector Single-Width Integer Add and Subtract
|
|
// 11.5. Vector Bitwise Logical Instructions
|
|
defm "" : LMULSchedReads<"ReadVIALUV">;
|
|
defm "" : LMULSchedReads<"ReadVIALUX">;
|
|
// 11.2. Vector Widening Integer Add/Subtract
|
|
defm "" : LMULSchedReadsW<"ReadVIWALUV">;
|
|
defm "" : LMULSchedReadsW<"ReadVIWALUX">;
|
|
// 11.3. Vector Integer Extension
|
|
defm "" : LMULSchedReads<"ReadVExtV">;
|
|
// 11.4. Vector Integer Arithmetic with Carry or Borrow Instructions
|
|
defm "" : LMULSchedReads<"ReadVICALUV">;
|
|
defm "" : LMULSchedReads<"ReadVICALUX">;
|
|
// 11.6. Vector Single-Width Bit Shift Instructions
|
|
defm "" : LMULSchedReads<"ReadVShiftV">;
|
|
defm "" : LMULSchedReads<"ReadVShiftX">;
|
|
// 11.7. Vector Narrowing Integer Right Shift Instructions
|
|
defm "" : LMULSchedReadsW<"ReadVNShiftV">;
|
|
defm "" : LMULSchedReadsW<"ReadVNShiftX">;
|
|
// 11.8. Vector Integer Comparison Instructions
|
|
// 11.9. Vector Integer Min/Max Instructions
|
|
defm "" : LMULSchedReads<"ReadVICmpV">;
|
|
defm "" : LMULSchedReads<"ReadVICmpX">;
|
|
// 11.10. Vector Single-Width Integer Multiply Instructions
|
|
defm "" : LMULSchedReads<"ReadVIMulV">;
|
|
defm "" : LMULSchedReads<"ReadVIMulX">;
|
|
// 11.11. Vector Integer Divide Instructions
|
|
defm "" : LMULSchedReads<"ReadVIDivV">;
|
|
defm "" : LMULSchedReads<"ReadVIDivX">;
|
|
// 11.12. Vector Widening Integer Multiply Instructions
|
|
defm "" : LMULSchedReadsW<"ReadVIWMulV">;
|
|
defm "" : LMULSchedReadsW<"ReadVIWMulX">;
|
|
// 11.13. Vector Single-Width Integer Multiply-Add Instructions
|
|
defm "" : LMULSchedReads<"ReadVIMulAddV">;
|
|
defm "" : LMULSchedReads<"ReadVIMulAddX">;
|
|
// 11.14. Vector Widening Integer Multiply-Add Instructions
|
|
defm "" : LMULSchedReadsW<"ReadVIWMulAddV">;
|
|
defm "" : LMULSchedReadsW<"ReadVIWMulAddX">;
|
|
// 11.15. Vector Integer Merge Instructions
|
|
defm "" : LMULSchedReads<"ReadVIMergeV">;
|
|
defm "" : LMULSchedReads<"ReadVIMergeX">;
|
|
// 11.16. Vector Integer Move Instructions
|
|
defm "" : LMULSchedReads<"ReadVIMovV">;
|
|
defm "" : LMULSchedReads<"ReadVIMovX">;
|
|
|
|
// 12. Vector Fixed-Point Arithmetic Instructions
|
|
// 12.1. Vector Single-Width Saturating Add and Subtract
|
|
defm "" : LMULSchedReads<"ReadVSALUV">;
|
|
defm "" : LMULSchedReads<"ReadVSALUX">;
|
|
// 12.2. Vector Single-Width Averaging Add and Subtract
|
|
defm "" : LMULSchedReads<"ReadVAALUV">;
|
|
defm "" : LMULSchedReads<"ReadVAALUX">;
|
|
// 12.3. Vector Single-Width Fractional Multiply with Rounding and Saturation
|
|
defm "" : LMULSchedReads<"ReadVSMulV">;
|
|
defm "" : LMULSchedReads<"ReadVSMulX">;
|
|
// 12.4. Vector Single-Width Scaling Shift Instructions
|
|
defm "" : LMULSchedReads<"ReadVSShiftV">;
|
|
defm "" : LMULSchedReads<"ReadVSShiftX">;
|
|
// 12.5. Vector Narrowing Fixed-Point Clip Instructions
|
|
defm "" : LMULSchedReadsW<"ReadVNClipV">;
|
|
defm "" : LMULSchedReadsW<"ReadVNClipX">;
|
|
|
|
// 13. Vector Floating-Point Instructions
|
|
// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
|
|
defm "" : LMULSchedReads<"ReadVFALUV">;
|
|
defm "" : LMULSchedReads<"ReadVFALUF">;
|
|
// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
|
|
defm "" : LMULSchedReadsFW<"ReadVFWALUV">;
|
|
defm "" : LMULSchedReadsFW<"ReadVFWALUF">;
|
|
// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
|
|
defm "" : LMULSchedReads<"ReadVFMulV">;
|
|
defm "" : LMULSchedReads<"ReadVFMulF">;
|
|
defm "" : LMULSchedReads<"ReadVFDivV">;
|
|
defm "" : LMULSchedReads<"ReadVFDivF">;
|
|
// 13.5. Vector Widening Floating-Point Multiply
|
|
defm "" : LMULSchedReadsFW<"ReadVFWMulV">;
|
|
defm "" : LMULSchedReadsFW<"ReadVFWMulF">;
|
|
// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
|
|
defm "" : LMULSchedReads<"ReadVFMulAddV">;
|
|
defm "" : LMULSchedReads<"ReadVFMulAddF">;
|
|
// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
|
|
defm "" : LMULSchedReadsFW<"ReadVFWMulAddV">;
|
|
defm "" : LMULSchedReadsFW<"ReadVFWMulAddF">;
|
|
// 13.8. Vector Floating-Point Square-Root Instruction
|
|
defm "" : LMULSchedReads<"ReadVFSqrtV">;
|
|
// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
|
|
// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
|
|
defm "" : LMULSchedReads<"ReadVFRecpV">;
|
|
// 13.11. Vector Floating-Point MIN/MAX Instructions
|
|
// 13.13. Vector Floating-Point Compare Instructions
|
|
defm "" : LMULSchedReads<"ReadVFCmpV">;
|
|
defm "" : LMULSchedReads<"ReadVFCmpF">;
|
|
// 13.12. Vector Floating-Point Sign-Injection Instructions
|
|
defm "" : LMULSchedReads<"ReadVFSgnjV">;
|
|
defm "" : LMULSchedReads<"ReadVFSgnjF">;
|
|
// 13.14. Vector Floating-Point Classify Instruction
|
|
defm "" : LMULSchedReads<"ReadVFClassV">;
|
|
// 13.15. Vector Floating-Point Merge Instruction
|
|
defm "" : LMULSchedReads<"ReadVFMergeV">;
|
|
defm "" : LMULSchedReads<"ReadVFMergeF">;
|
|
// 13.16. Vector Floating-Point Move Instruction
|
|
defm "" : LMULSchedReads<"ReadVFMovF">;
|
|
// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
|
|
defm "" : LMULSchedReads<"ReadVFCvtIToFV">;
|
|
defm "" : LMULSchedReads<"ReadVFCvtFToIV">;
|
|
// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
|
|
defm "" : LMULSchedReadsW<"ReadVFWCvtIToFV">;
|
|
defm "" : LMULSchedReadsFW<"ReadVFWCvtFToIV">;
|
|
defm "" : LMULSchedReadsFW<"ReadVFWCvtFToFV">;
|
|
// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
|
|
defm "" : LMULSchedReadsFW<"ReadVFNCvtIToFV">;
|
|
defm "" : LMULSchedReadsW<"ReadVFNCvtFToIV">;
|
|
defm "" : LMULSchedReadsFW<"ReadVFNCvtFToFV">;
|
|
|
|
// 14. Vector Reduction Operations
|
|
// 14.1. Vector Single-Width Integer Reduction Instructions
|
|
def ReadVIRedV : SchedRead;
|
|
def ReadVIRedV0 : SchedRead;
|
|
// 14.2. Vector Widening Integer Reduction Instructions
|
|
def ReadVIWRedV : SchedRead;
|
|
def ReadVIWRedV0 : SchedRead;
|
|
// 14.3. Vector Single-Width Floating-Point Reduction Instructions
|
|
def ReadVFRedV : SchedRead;
|
|
def ReadVFRedV0 : SchedRead;
|
|
def ReadVFRedOV : SchedRead;
|
|
def ReadVFRedOV0 : SchedRead;
|
|
// 14.4. Vector Widening Floating-Point Reduction Instructions
|
|
def ReadVFWRedV : SchedRead;
|
|
def ReadVFWRedV0 : SchedRead;
|
|
def ReadVFWRedOV : SchedRead;
|
|
def ReadVFWRedOV0 : SchedRead;
|
|
|
|
// 15. Vector Mask Instructions
|
|
// 15.1. Vector Mask-Register Logical Instructions
|
|
defm "" : LMULSchedReads<"ReadVMALUV">;
|
|
// 15.2. Vector Mask Population Count
|
|
defm "" : LMULSchedReads<"ReadVMPopV">;
|
|
// 15.3. Vector Find-First-Set Mask Bit
|
|
defm "" : LMULSchedReads<"ReadVMFFSV">;
|
|
// 15.4. Vector Set-Before-First Mask Bit
|
|
// 15.5. Vector Set-Including-First Mask Bit
|
|
// 15.6. Vector Set-only-First Mask Bit
|
|
defm "" : LMULSchedReads<"ReadVMSFSV">;
|
|
// 15.8. Vector Iota Instruction
|
|
defm "" : LMULSchedReads<"ReadVMIotV">;
|
|
|
|
// 16. Vector Permutation Instructions
|
|
// 16.1. Integer Scalar Move Instructions
|
|
defm "" : LMULSchedReads<"ReadVIMovVX">;
|
|
defm "" : LMULSchedReads<"ReadVIMovXV">;
|
|
defm "" : LMULSchedReads<"ReadVIMovXX">;
|
|
// 16.2. Floating-Point Scalar Move Instructions
|
|
defm "" : LMULSchedReads<"ReadVFMovVF">;
|
|
defm "" : LMULSchedReads<"ReadVFMovFV">;
|
|
defm "" : LMULSchedReads<"ReadVFMovFX">;
|
|
// 16.3. Vector Slide Instructions
|
|
defm "" : LMULSchedReads<"ReadVISlideV">;
|
|
defm "" : LMULSchedReads<"ReadVISlideX">;
|
|
defm "" : LMULSchedReads<"ReadVFSlideV">;
|
|
defm "" : LMULSchedReads<"ReadVFSlideF">;
|
|
// 16.4. Vector Register Gather Instructions
|
|
defm "" : LMULSchedReads<"ReadVGatherV">;
|
|
defm "" : LMULSchedReads<"ReadVGatherX">;
|
|
// 16.5. Vector Compress Instruction
|
|
defm "" : LMULSchedReads<"ReadVCompressV">;
|
|
// 16.6. Whole Vector Register Move
|
|
// These are already LMUL aware
|
|
def ReadVMov1V : SchedRead;
|
|
def ReadVMov2V : SchedRead;
|
|
def ReadVMov4V : SchedRead;
|
|
def ReadVMov8V : SchedRead;
|
|
|
|
// Others
|
|
def ReadVMask : SchedRead;
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
/// Define default scheduler resources for V.
|
|
|
|
multiclass UnsupportedSchedV {
|
|
let Unsupported = true in {
|
|
|
|
// 3.6 Vector Byte Length vlenb
|
|
def : WriteRes<WriteRdVLENB, []>;
|
|
|
|
// 6. Configuration-Setting Instructions
|
|
def : WriteRes<WriteVSETVLI, []>;
|
|
def : WriteRes<WriteVSETIVLI, []>;
|
|
def : WriteRes<WriteVSETVL, []>;
|
|
|
|
// 7. Vector Loads and Stores
|
|
defm "" : LMULWriteRes<"WriteVLDE", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTE", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDM", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTM", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDS8", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDS16", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDS32", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDS64", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTS8", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTS16", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTS32", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTS64", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDUX8", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDUX16", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDUX32", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDUX64", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDOX8", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDOX16", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDOX32", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDOX64", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTUX8", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTUX16", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTUX32", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTUX64", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTOX8", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTOX16", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTOX32", []>;
|
|
defm "" : LMULWriteRes<"WriteVSTOX64", []>;
|
|
defm "" : LMULWriteRes<"WriteVLDFF", []>;
|
|
// These are already LMUL aware
|
|
def : WriteRes<WriteVLD1R, []>;
|
|
def : WriteRes<WriteVLD2R, []>;
|
|
def : WriteRes<WriteVLD4R, []>;
|
|
def : WriteRes<WriteVLD8R, []>;
|
|
def : WriteRes<WriteVST1R, []>;
|
|
def : WriteRes<WriteVST2R, []>;
|
|
def : WriteRes<WriteVST4R, []>;
|
|
def : WriteRes<WriteVST8R, []>;
|
|
// Vector Segment Loads and Stores
|
|
foreach nf=2-8 in {
|
|
foreach eew = [8, 16, 32, 64] in {
|
|
defm "" : LMULWriteRes <"WriteVLSEG" # nf # "e" # eew, []>;
|
|
defm "" : LMULWriteRes <"WriteVLSEGFF" # nf # "e" # eew, []>;
|
|
defm "" : LMULWriteRes <"WriteVSSEG" # nf # "e" # eew, []>;
|
|
defm "" : LMULWriteRes <"WriteVLSSEG" # nf # "e" # eew, []>;
|
|
defm "" : LMULWriteRes <"WriteVSSSEG" # nf # "e" # eew, []>;
|
|
defm "" : LMULWriteRes <"WriteVLUXSEG" # nf # "e" # eew, []>;
|
|
defm "" : LMULWriteRes <"WriteVLOXSEG" # nf # "e" # eew, []>;
|
|
defm "" : LMULWriteRes <"WriteVSUXSEG" # nf # "e" # eew, []>;
|
|
defm "" : LMULWriteRes <"WriteVSOXSEG" # nf # "e" # eew, []>;
|
|
}
|
|
}
|
|
|
|
// 11. Vector Integer Arithmetic Instructions
|
|
defm "" : LMULWriteRes<"WriteVIALUV", []>;
|
|
defm "" : LMULWriteRes<"WriteVIALUX", []>;
|
|
defm "" : LMULWriteRes<"WriteVIALUI", []>;
|
|
defm "" : LMULWriteResW<"WriteVIWALUV", []>;
|
|
defm "" : LMULWriteResW<"WriteVIWALUX", []>;
|
|
defm "" : LMULWriteResW<"WriteVIWALUI", []>;
|
|
defm "" : LMULWriteRes<"WriteVExtV", []>;
|
|
defm "" : LMULWriteRes<"WriteVICALUV", []>;
|
|
defm "" : LMULWriteRes<"WriteVICALUX", []>;
|
|
defm "" : LMULWriteRes<"WriteVICALUI", []>;
|
|
defm "" : LMULWriteRes<"WriteVShiftV", []>;
|
|
defm "" : LMULWriteRes<"WriteVShiftX", []>;
|
|
defm "" : LMULWriteRes<"WriteVShiftI", []>;
|
|
defm "" : LMULWriteResW<"WriteVNShiftV", []>;
|
|
defm "" : LMULWriteResW<"WriteVNShiftX", []>;
|
|
defm "" : LMULWriteResW<"WriteVNShiftI", []>;
|
|
defm "" : LMULWriteRes<"WriteVICmpV", []>;
|
|
defm "" : LMULWriteRes<"WriteVICmpX", []>;
|
|
defm "" : LMULWriteRes<"WriteVICmpI", []>;
|
|
defm "" : LMULWriteRes<"WriteVIMulV", []>;
|
|
defm "" : LMULWriteRes<"WriteVIMulX", []>;
|
|
defm "" : LMULWriteRes<"WriteVIDivV", []>;
|
|
defm "" : LMULWriteRes<"WriteVIDivX", []>;
|
|
defm "" : LMULWriteResW<"WriteVIWMulV", []>;
|
|
defm "" : LMULWriteResW<"WriteVIWMulX", []>;
|
|
defm "" : LMULWriteRes<"WriteVIMulAddV", []>;
|
|
defm "" : LMULWriteRes<"WriteVIMulAddX", []>;
|
|
defm "" : LMULWriteResW<"WriteVIWMulAddV", []>;
|
|
defm "" : LMULWriteResW<"WriteVIWMulAddX", []>;
|
|
defm "" : LMULWriteRes<"WriteVIMergeV", []>;
|
|
defm "" : LMULWriteRes<"WriteVIMergeX", []>;
|
|
defm "" : LMULWriteRes<"WriteVIMergeI", []>;
|
|
defm "" : LMULWriteRes<"WriteVIMovV", []>;
|
|
defm "" : LMULWriteRes<"WriteVIMovX", []>;
|
|
defm "" : LMULWriteRes<"WriteVIMovI", []>;
|
|
|
|
// 12. Vector Fixed-Point Arithmetic Instructions
|
|
defm "" : LMULWriteRes<"WriteVSALUV", []>;
|
|
defm "" : LMULWriteRes<"WriteVSALUX", []>;
|
|
defm "" : LMULWriteRes<"WriteVSALUI", []>;
|
|
defm "" : LMULWriteRes<"WriteVAALUV", []>;
|
|
defm "" : LMULWriteRes<"WriteVAALUX", []>;
|
|
defm "" : LMULWriteRes<"WriteVSMulV", []>;
|
|
defm "" : LMULWriteRes<"WriteVSMulX", []>;
|
|
defm "" : LMULWriteRes<"WriteVSShiftV", []>;
|
|
defm "" : LMULWriteRes<"WriteVSShiftX", []>;
|
|
defm "" : LMULWriteRes<"WriteVSShiftI", []>;
|
|
defm "" : LMULWriteResW<"WriteVNClipV", []>;
|
|
defm "" : LMULWriteResW<"WriteVNClipX", []>;
|
|
defm "" : LMULWriteResW<"WriteVNClipI", []>;
|
|
|
|
// 13. Vector Floating-Point Instructions
|
|
defm "" : LMULWriteRes<"WriteVFALUV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFALUF", []>;
|
|
defm "" : LMULWriteResFW<"WriteVFWALUV", []>;
|
|
defm "" : LMULWriteResFW<"WriteVFWALUF", []>;
|
|
defm "" : LMULWriteRes<"WriteVFMulV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFMulF", []>;
|
|
defm "" : LMULWriteRes<"WriteVFDivV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFDivF", []>;
|
|
defm "" : LMULWriteResFW<"WriteVFWMulV", []>;
|
|
defm "" : LMULWriteResFW<"WriteVFWMulF", []>;
|
|
defm "" : LMULWriteRes<"WriteVFMulAddV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFMulAddF", []>;
|
|
defm "" : LMULWriteResFW<"WriteVFWMulAddV", []>;
|
|
defm "" : LMULWriteResFW<"WriteVFWMulAddF", []>;
|
|
defm "" : LMULWriteRes<"WriteVFSqrtV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFRecpV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFCmpV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFCmpF", []>;
|
|
defm "" : LMULWriteRes<"WriteVFSgnjV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFSgnjF", []>;
|
|
defm "" : LMULWriteRes<"WriteVFClassV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFMergeV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFMovV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFCvtIToFV", []>;
|
|
defm "" : LMULWriteRes<"WriteVFCvtFToIV", []>;
|
|
defm "" : LMULWriteResW<"WriteVFWCvtIToFV", []>;
|
|
defm "" : LMULWriteResFW<"WriteVFWCvtFToIV", []>;
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defm "" : LMULWriteResFW<"WriteVFWCvtFToFV", []>;
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defm "" : LMULWriteResFW<"WriteVFNCvtIToFV", []>;
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|
defm "" : LMULWriteResW<"WriteVFNCvtFToIV", []>;
|
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defm "" : LMULWriteResFW<"WriteVFNCvtFToFV", []>;
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|
|
// 14. Vector Reduction Operations
|
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def : WriteRes<WriteVIRedV, []>;
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def : WriteRes<WriteVIWRedV, []>;
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def : WriteRes<WriteVFRedV, []>;
|
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def : WriteRes<WriteVFRedOV, []>;
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def : WriteRes<WriteVFWRedV, []>;
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def : WriteRes<WriteVFWRedOV, []>;
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|
|
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// 15. Vector Mask Instructions
|
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defm "" : LMULWriteRes<"WriteVMALUV", []>;
|
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defm "" : LMULWriteRes<"WriteVMPopV", []>;
|
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defm "" : LMULWriteRes<"WriteVMFFSV", []>;
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defm "" : LMULWriteRes<"WriteVMSFSV", []>;
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defm "" : LMULWriteRes<"WriteVMIotV", []>;
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defm "" : LMULWriteRes<"WriteVMIdxV", []>;
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|
|
|
// 16. Vector Permutation Instructions
|
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defm "" : LMULWriteRes<"WriteVIMovVX", []>;
|
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defm "" : LMULWriteRes<"WriteVIMovXV", []>;
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defm "" : LMULWriteRes<"WriteVFMovVF", []>;
|
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defm "" : LMULWriteRes<"WriteVFMovFV", []>;
|
|
defm "" : LMULWriteRes<"WriteVISlideX", []>;
|
|
defm "" : LMULWriteRes<"WriteVISlideI", []>;
|
|
defm "" : LMULWriteRes<"WriteVISlide1X", []>;
|
|
defm "" : LMULWriteRes<"WriteVFSlide1F", []>;
|
|
defm "" : LMULWriteRes<"WriteVGatherV", []>;
|
|
defm "" : LMULWriteRes<"WriteVGatherX", []>;
|
|
defm "" : LMULWriteRes<"WriteVGatherI", []>;
|
|
defm "" : LMULWriteRes<"WriteVCompressV", []>;
|
|
// These are already LMUL aware
|
|
def : WriteRes<WriteVMov1V, []>;
|
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def : WriteRes<WriteVMov2V, []>;
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def : WriteRes<WriteVMov4V, []>;
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def : WriteRes<WriteVMov8V, []>;
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|
|
|
// 6. Configuration-Setting Instructions
|
|
def : ReadAdvance<ReadVSETVLI, 0>;
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def : ReadAdvance<ReadVSETVL, 0>;
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|
|
|
// 7. Vector Loads and Stores
|
|
defm "" : LMULReadAdvance<"ReadVLDX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTEV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTM", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVLDSX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTSX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTS8V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTS16V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTS32V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTS64V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVLDUXV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVLDOXV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTUXV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTUX8", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTUX16", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTUX32", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTUX64", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTUX8V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTUX16V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTUX32V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTUX64V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTOX8", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTOX16", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTOX32", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTOX64", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTOXV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTOX8V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTOX16V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTOX32V", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSTOX64V", 0>;
|
|
// These are already LMUL aware
|
|
def : ReadAdvance<ReadVST1R, 0>;
|
|
def : ReadAdvance<ReadVST2R, 0>;
|
|
def : ReadAdvance<ReadVST4R, 0>;
|
|
def : ReadAdvance<ReadVST8R, 0>;
|
|
|
|
// 11. Vector Integer Arithmetic Instructions
|
|
defm "" : LMULReadAdvance<"ReadVIALUV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIALUX", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVIWALUV", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVIWALUX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVExtV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVICALUV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVICALUX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVShiftV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVShiftX", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVNShiftV", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVNShiftX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVICmpV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVICmpX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIMulV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIMulX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIDivV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIDivX", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVIWMulV", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVIWMulX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIMulAddV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIMulAddX", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVIWMulAddV", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVIWMulAddX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIMergeV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIMergeX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIMovV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIMovX", 0>;
|
|
|
|
// 12. Vector Fixed-Point Arithmetic Instructions
|
|
defm "" : LMULReadAdvance<"ReadVSALUV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSALUX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVAALUV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVAALUX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSMulV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSMulX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSShiftV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVSShiftX", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVNClipV", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVNClipX", 0>;
|
|
|
|
// 13. Vector Floating-Point Instructions
|
|
defm "" : LMULReadAdvance<"ReadVFALUV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFALUF", 0>;
|
|
defm "" : LMULReadAdvanceFW<"ReadVFWALUV", 0>;
|
|
defm "" : LMULReadAdvanceFW<"ReadVFWALUF", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFMulV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFMulF", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFDivV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFDivF", 0>;
|
|
defm "" : LMULReadAdvanceFW<"ReadVFWMulV", 0>;
|
|
defm "" : LMULReadAdvanceFW<"ReadVFWMulF", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFMulAddV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFMulAddF", 0>;
|
|
defm "" : LMULReadAdvanceFW<"ReadVFWMulAddV", 0>;
|
|
defm "" : LMULReadAdvanceFW<"ReadVFWMulAddF", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFSqrtV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFRecpV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFCmpV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFCmpF", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFSgnjV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFSgnjF", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFClassV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFMergeV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFMergeF", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFMovF", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFCvtIToFV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFCvtFToIV", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVFWCvtIToFV", 0>;
|
|
defm "" : LMULReadAdvanceFW<"ReadVFWCvtFToIV", 0>;
|
|
defm "" : LMULReadAdvanceFW<"ReadVFWCvtFToFV", 0>;
|
|
defm "" : LMULReadAdvanceFW<"ReadVFNCvtIToFV", 0>;
|
|
defm "" : LMULReadAdvanceW<"ReadVFNCvtFToIV", 0>;
|
|
defm "" : LMULReadAdvanceFW<"ReadVFNCvtFToFV", 0>;
|
|
|
|
// 14. Vector Reduction Operations
|
|
def : ReadAdvance<ReadVIRedV, 0>;
|
|
def : ReadAdvance<ReadVIRedV0, 0>;
|
|
def : ReadAdvance<ReadVIWRedV, 0>;
|
|
def : ReadAdvance<ReadVIWRedV0, 0>;
|
|
def : ReadAdvance<ReadVFRedV, 0>;
|
|
def : ReadAdvance<ReadVFRedV0, 0>;
|
|
def : ReadAdvance<ReadVFRedOV, 0>;
|
|
def : ReadAdvance<ReadVFRedOV0, 0>;
|
|
def : ReadAdvance<ReadVFWRedV, 0>;
|
|
def : ReadAdvance<ReadVFWRedV0, 0>;
|
|
def : ReadAdvance<ReadVFWRedOV, 0>;
|
|
def : ReadAdvance<ReadVFWRedOV0, 0>;
|
|
|
|
// 15. Vector Mask Instructions
|
|
defm "" : LMULReadAdvance<"ReadVMALUV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVMPopV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVMFFSV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVMSFSV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVMIotV", 0>;
|
|
|
|
// 16. Vector Permutation Instructions
|
|
defm "" : LMULReadAdvance<"ReadVIMovVX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIMovXV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVIMovXX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFMovVF", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFMovFV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFMovFX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVISlideV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVISlideX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFSlideV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVFSlideF", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVGatherV", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVGatherX", 0>;
|
|
defm "" : LMULReadAdvance<"ReadVCompressV", 0>;
|
|
// These are already LMUL aware
|
|
def : ReadAdvance<ReadVMov1V, 0>;
|
|
def : ReadAdvance<ReadVMov2V, 0>;
|
|
def : ReadAdvance<ReadVMov4V, 0>;
|
|
def : ReadAdvance<ReadVMov8V, 0>;
|
|
|
|
// Others
|
|
def : ReadAdvance<ReadVMask, 0>;
|
|
|
|
} // Unsupported
|
|
} // UnsupportedSchedV
|