llvm-project

bf16.ll

[VPlan] Remove original loop blocks if dead. (#155497 )

2025-10-01 16:53:59 +00:00

blend-any-of-reduction-cost.ll

[RISCV] Enable tail folding by default (#151681 )

2025-08-08 14:26:23 +08:00

blocks-with-dead-instructions.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

cse.ll

[VPlan] Remove verifier check that EVL can only be used by VPInstruction with one use (#175502 )

2026-01-12 14:58:04 +00:00

dbg-tail-folding-by-evl.ll

[VPlan] Extract reverse operation for reverse accesses (#146525 )

2025-12-18 14:57:48 +00:00

dead-ops-cost.ll

[LV] Prevent extract-lane generate unused IRs with single vector operand. (#172798 )

2026-01-16 13:59:51 +08:00

defaults.ll

[VPlan] Remove original loop blocks if dead. (#155497 )

2025-10-01 16:53:59 +00:00

divrem.ll

[RISCV] Set the reciprocal throughtput cost for division to TTI::TCC_Expensive (#177516 )

2026-01-27 11:01:19 -08:00

evl-compatible-loops.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

f16.ll

[VPlan] Remove original loop blocks if dead. (#155497 )

2025-10-01 16:53:59 +00:00

first-order-recurrence-scalable-vf1.ll

[LV] Prevent extract-lane generate unused IRs with single vector operand. (#172798 )

2026-01-16 13:59:51 +08:00

fminimumnum.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

fold-tail-low-trip-count.ll

[LV][NFC] Update low trip count tail-folding tests (#176898 )

2026-01-20 12:15:50 +00:00

force-vect-msg.ll

[LV][RISCV] Try fixing Windows buildbot failure in force-vect-msg.ll. NFC

2025-08-09 21:09:36 +08:00

gather-scatter-cost.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

illegal-type.ll

…

induction-costs.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

inloop-reduction.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

interleaved-accesses-zve32x.ll

…

interleaved-accesses.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

interleaved-cost.ll

[RISCV] Enable tail folding by default (#151681 )

2025-08-08 14:26:23 +08:00

interleaved-masked-access.ll

Reland [VPlan] Expand WidenInt inductions with nuw/nsw (#168354 )

2025-11-17 13:44:25 +00:00

interleaved-store-with-gap.ll

Reland [VPlan] Expand WidenInt inductions with nuw/nsw (#168354 )

2025-11-17 13:44:25 +00:00

lit.local.cfg

…

lmul.ll

[VPlan] Remove original loop blocks if dead. (#155497 )

2025-10-01 16:53:59 +00:00

low-trip-count.ll

[VPlan] Simplify ExplicitVectorLength(%AVL) -> %AVL when AVL <= VF (#167647 )

2025-11-13 13:17:01 +00:00

mask-index-type.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

masked_gather_scatter.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

only-compute-cost-for-vplan-vfs.ll

[VPlan] Support VPWidenPointerInductionRecipes with EVL tail folding (#152110 )

2025-08-07 10:54:24 +08:00

ordered-reduction.ll

[VPlan] Remove VPVectorPointer for part 0 after unrolling. (#149735 )

2025-07-27 13:53:26 +01:00

partial-reduce-dot-product.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

pointer-induction-rv32.ll

[VPlan] Allow VPInstruction::PtrAdd as a user of EVL (#175506 )

2026-01-13 07:55:15 +00:00

pointer-induction.ll

[LV] Prevent extract-lane generate unused IRs with single vector operand. (#172798 )

2026-01-16 13:59:51 +08:00

pr87378-vpinstruction-or-drop-poison-generating-flags.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

pr88802.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

pr154103.ll

[Reland] "[RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI. #149955 " (#156386 )

2025-09-02 11:43:27 +08:00

predicated-costs.ll

[VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (#158690 )

2025-12-08 14:28:26 +00:00

predicated-reverse-store.ll

[LV] Add missing coverage for LV cost model code paths.

2026-01-17 21:59:50 +00:00

preserve-dbg-loc.ll

[RISCV][LV] Use predicate-else-scalar-epilogue flag in tail folding tests. NFC

2025-07-28 17:04:00 +08:00

reductions.ll

[VPlan] Use DL index type consistently for GEPs (#169396 )

2025-11-26 12:25:55 +00:00

reg-usage-bf16.ll

[VPlan] Always consider register pressure on RISC-V (#156951 )

2025-09-12 06:21:54 +00:00

reg-usage-f16.ll

[VPlan] Always consider register pressure on RISC-V (#156951 )

2025-09-12 06:21:54 +00:00

reg-usage-maxbandwidth.ll

[LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (#154482 )

2025-08-21 07:39:01 +08:00

reg-usage-prune-vf.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

reg-usage.ll

[VPlan] Always consider register pressure on RISC-V (#156951 )

2025-09-12 06:21:54 +00:00

remark-reductions.ll

[VPlan] Remove original loop blocks if dead. (#155497 )

2025-10-01 16:53:59 +00:00

riscv-interleaved.ll

[RISCV] Remove -riscv-v-vector-bits-min from LoopVectorize tests. NFC (#148565 )

2025-07-14 21:59:35 +08:00

riscv-unroll.ll

[VPlan] Remove VPVectorPointer for part 0 after unrolling. (#149735 )

2025-07-27 13:53:26 +01:00

riscv-vector-reverse.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

safe-dep-distance.ll

Reland [VPlan] Expand WidenInt inductions with nuw/nsw (#168354 )

2025-11-17 13:44:25 +00:00

scalable-basics.ll

[VPlan] Remove original loop blocks if dead. (#155497 )

2025-10-01 16:53:59 +00:00

scalable-tailfold.ll

[LV] Simplify extract-lane with scalar operand to the scalar value itself. (#174534 )

2026-01-12 10:03:44 +08:00

scalable-vf-hint.ll

…

select-cmp-reduction.ll

[VPlan] Remove original loop blocks if dead. (#155497 )

2025-10-01 16:53:59 +00:00

select-invariant-cond-cost.ll

…

short-trip-count.ll

[RISCV] Enable tail folding by default (#151681 )

2025-08-08 14:26:23 +08:00

sink-to-early-exit.ll

[LV] Pre-commit test for sinking the recipe into vector early exit block. nfc (#177954 )

2026-01-28 04:17:12 +00:00

strided-accesses.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

tail-folding-bin-unary-ops-args.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

tail-folding-call-intrinsics.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

tail-folding-cast-intrinsics.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

tail-folding-complex-mask.ll

[LV][NFC] Follow-up fix for #173262 (#175513 )

2026-01-13 02:35:35 +00:00

tail-folding-cond-reduction.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

tail-folding-cost.ll

[RISCV][LV] Remove redundant -force-tail-folding-style from tests. NFC

2025-07-28 16:11:01 +08:00

tail-folding-div.ll

[LV] Conservatively predicate SDiv/SRem (#170818 )

2026-01-07 04:25:38 +00:00

tail-folding-fixed-order-recurrence.ll

[LV] Prevent extract-lane generate unused IRs with single vector operand. (#172798 )

2026-01-16 13:59:51 +08:00

tail-folding-gather-scatter.ll

[Reland] "[RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI. #149955 " (#156386 )

2025-09-02 11:43:27 +08:00

tail-folding-inloop-reduction.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

tail-folding-interleave.ll

[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159 )

2026-01-07 10:35:08 +00:00

tail-folding-intermediate-store.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

tail-folding-iv32.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

tail-folding-known-no-overflow.ll

[VPlan] Remove original loop blocks if dead. (#155497 )

2025-10-01 16:53:59 +00:00

tail-folding-masked-loadstore.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

tail-folding-no-masking.ll

[RISCV][LV] Use predicate-else-scalar-epilogue flag in tail folding tests. NFC

2025-07-28 17:04:00 +08:00

tail-folding-ordered-reduction.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

tail-folding-reduction-cost.ll

[RISCV][LV] Use predicate-else-scalar-epilogue flag in tail folding tests. NFC

2025-07-28 17:04:00 +08:00

tail-folding-reduction.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

tail-folding-reverse-load-store.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

tail-folding-safe-dep-distance.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

tail-folding-uniform-store.ll

[VPlan] Extract reverse operation for reverse accesses (#146525 )

2025-12-18 14:57:48 +00:00

transform-narrow-interleave-to-widen-memory.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

truncate-to-minimal-bitwidth-cost.ll

[LV] Check for TruncInsts in canTruncateToMinimalBitwidth.

2025-10-20 22:31:16 +01:00

truncate-to-minimal-bitwidth-evl-crash.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

type-info-cache-evl-crash.ll

[LV][EVL] Remove metadata on EVL vectorized loops (#155760 )

2025-09-23 07:39:33 +08:00

uniform-load-store.ll

[LV] Simplify extract-lane with scalar operand to the scalar value itself. (#174534 )

2026-01-12 10:03:44 +08:00

unroll-in-loop-vectorizer.ll

[RISCV] Remove -riscv-v-vector-bits-min from LoopVectorize tests. NFC (#148565 )

2025-07-14 21:59:35 +08:00

veclib-function-calls.ll

[IR] Mark vector intrinsics speculatable (#162334 )

2025-10-09 09:41:59 +01:00

vector-loop-backedge-elimination-with-evl.ll

[VPlan] Simplify ExplicitVectorLength(%AVL) -> %AVL when AVL <= VF (#167647 )

2025-11-13 13:17:01 +00:00

vectorize-vp-intrinsics.ll

Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581 )

2026-01-06 20:36:26 +00:00

vf-will-not-generate-any-vector-insts.ll

[VPlan] Hoist loads with invariant addresses using noalias metadata. (#166247 )

2025-11-18 09:35:48 +00:00

vplan-riscv-vector-reverse.ll

[VPlan] Extract reverse operation for reverse accesses (#146525 )

2025-12-18 14:57:48 +00:00

vplan-vp-intrinsics-fixed-order-recurrence.ll

[VPlan] Include flags in VectorPointerRecipe::printRecipe (#169466 )

2025-11-25 10:26:51 +00:00

vplan-vp-intrinsics-reduction.ll

[VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (#174026 )

2026-01-14 07:45:44 +00:00

vplan-vp-intrinsics.ll

[VPlan] Explicitly test EVL recipe has "evl" name. NFC

2026-01-15 15:25:01 +08:00

zvl32b.ll

…