ef8655adc8
CUDA-12 no longer supports 32-bit compilation. Tests agnostic to 32/64 compilation mode are switched to use nvptx64. Tests that do care about it have 32-bit ptxas compilation disabled with cuda-12+. Differential Revision: https://reviews.llvm.org/D152199
34 lines
723 B
LLVM
34 lines
723 B
LLVM
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
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; CHECK: bfe0
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define i32 @bfe0(i32 %a) {
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; CHECK: bfe.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, 4, 4
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; CHECK-NOT: shr
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; CHECK-NOT: and
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%val0 = ashr i32 %a, 4
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%val1 = and i32 %val0, 15
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ret i32 %val1
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}
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; CHECK: bfe1
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define i32 @bfe1(i32 %a) {
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; CHECK: bfe.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, 3, 3
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; CHECK-NOT: shr
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; CHECK-NOT: and
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%val0 = ashr i32 %a, 3
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%val1 = and i32 %val0, 7
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ret i32 %val1
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}
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; CHECK: bfe2
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define i32 @bfe2(i32 %a) {
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; CHECK: bfe.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, 5, 3
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; CHECK-NOT: shr
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; CHECK-NOT: and
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%val0 = ashr i32 %a, 5
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%val1 = and i32 %val0, 7
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ret i32 %val1
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}
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