Ivan Kosarev 60d6fbb621 [AMDGPU][GFX9][GFX10] Support base+soffset+offset SMEM atomics. ...

Resolves a part of
https://github.com/llvm/llvm-project/issues/38652

Reviewed By: dp

Differential Revision: https://reviews.llvm.org/D127314

2022-06-10 13:22:41 +01:00

..

AArch64

[AArch64] Support for Ampere1 core

2022-05-03 15:54:02 +01:00

AMDGPU

[AMDGPU][GFX9][GFX10] Support base+soffset+offset SMEM atomics.

2022-06-10 13:22:41 +01:00

ARC

[ARC] Add ADC (addition with carry) and SBC (subtraction with carry) instructions

2021-08-25 07:46:15 -07:00

ARM

[ARM] Implement PAC return address signing mechanism for PACBTI-M

2021-12-07 10:15:19 +00:00

Hexagon

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Lanai

…

M68k

[NFC][M68k][test] Add disassembler tests for move instructions

2022-05-22 10:35:13 +08:00

Mips

[mips] Add tests to check disassembling of add.ps/mul.ps/sub.ps instructions

2020-11-13 14:31:12 +03:00

MSP430

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PowerPC

[PowerPC] Set the special DSCR with a compiler option.

2022-03-31 14:06:30 -05:00

RISCV

[RISCV] Add support for Zihintpause extention

2022-02-03 20:55:47 +08:00

Sparc

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SystemZ

Support z16 processor name

2022-04-21 19:58:22 +02:00

WebAssembly

[WebAssembly] Update v128.any_true

2021-04-11 11:13:16 -07:00

X86

[MC][X86] Add vcmpps disassembler tests for Issue #41491

2022-05-06 15:39:17 +01:00

XCore

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